On Thu, 2025-06-12 at 13:49 +0200, Niklas Cassel wrote:
> Per PCIe r6.0, sec 6.6.1, software must generally wait a minimum of
> 100ms (PCIE_RESET_CONFIG_DEVICE_WAIT_MS) after Link training
> completes
> before sending a Configuration Request.
>
> Prior to 36971d6c5a9a ("PCI: qcom: Don't wait for link if we can
> detect
> Link Up"), qcom used dw_pcie_wait_for_link(), which waited between 0
> and 90ms after the link came up before we enumerate the bus, and this
> was apparently enough for most devices.
>
> After 36971d6c5a9a, qcom_pcie_global_irq_thread() started enumeration
> immediately when handling the link-up IRQ, and devices (e.g., Laszlo
> Fiat's PLEXTOR PX-256M8PeGN NVMe SSD) may not be ready to handle
> config
> requests yet.
>
> Delay PCIE_RESET_CONFIG_DEVICE_WAIT_MS after the link-up IRQ before
> starting enumeration.
>
> Reviewed-by: Damien Le Moal <dlemoal@xxxxxxxxxx>
> Fixes: 82a823833f4e ("PCI: qcom: Add Qualcomm PCIe controller
> driver")
> Signed-off-by: Niklas Cassel <cassel@xxxxxxxxxx>
> ---
> drivers/pci/controller/dwc/pcie-qcom.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c
> b/drivers/pci/controller/dwc/pcie-qcom.c
> index c789e3f85655..ff257fec6ad7 100644
> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> @@ -1564,6 +1564,7 @@ static irqreturn_t
> qcom_pcie_global_irq_thread(int irq, void *data)
> writel_relaxed(status, pcie->parf + PARF_INT_ALL_CLEAR);
>
> if (FIELD_GET(PARF_INT_ALL_LINK_UP, status)) {
> + msleep(PCIE_RESET_CONFIG_DEVICE_WAIT_MS);
> dev_dbg(dev, "Received Link up event. Starting
> enumeration!\n");
> /* Rescan the bus to enumerate endpoint devices */
> pci_lock_rescan_remove();
Reviewed-by: Wilfred Mallawa <wilfred.mallawa@xxxxxxx>
