Re: [PATCH v2 1/4] PCI: dw-rockchip: Do not enumerate bus before endpoint devices are ready

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On 30 May 2025 19:19:37 CEST, Bjorn Helgaas <helgaas@xxxxxxxxxx> wrote:
>
>I think all drivers should wait PCIE_T_RRS_READY_MS (100ms) after exit
>from Conventional Reset (if port only supports <= 5.0 GT/s) or after
>link training completes (if port supports > 5.0 GT/s).
>
>> So I don't think this is a device specific issue but rather
>> controller specific.  And this makes the Qcom patch that I dropped a
>> valid one (ofc with change in description).
>
>URL?

PATCH 4/4 of this series.


Kind regards,
Niklas






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