On Sun, May 25, 2025 at 12:23:03AM +0530, Manivannan Sadhasivam wrote: > --- a/drivers/pci/pci.c > +++ b/drivers/pci/pci.c > @@ -4985,10 +4985,19 @@ void __weak pcibios_reset_secondary_bus(struct pci_dev *dev) > struct pci_host_bridge *host = pci_find_host_bridge(dev->bus); > int ret; > > - if (host->reset_slot) { > + if (pci_is_root_bus(dev->bus) && host->reset_slot) { > + /* > + * Save the config space of the root port before doing the > + * reset, since the state could be lost. The device state > + * should've been saved by the caller. > + */ > + pci_save_state(dev); > ret = host->reset_slot(host, dev); Nit: Capitalize terms as the PCIe Base Spec does, i.e. "Root Port". "The device state" is ambiguous as the Root Port is a device itself and even referred to by the "dev" variable. I think what you mean is "The Endpoint state". Thanks, Lukas