On Fri, May 23, 2025 at 09:00:27PM +0530, Manivannan Sadhasivam wrote: > I thought that it *might* be possible to reset individual ports, > so that's why I passed the root port 'pci_dev' to the callback > in a hope that the controller drivers could use it to identify > the root port they are resetting. Makes sense. > You are right. We should check if the parent bus of the bridge > is a root bus or not. Okay, that's simple enough: pci_is_root_bus(dev->bus) > Yes, pretty much so. I could rename it to reset_root_port(), > since I still believe that multi root port setups may be able > to reset them separately. Conceivably, a PCIe host controller might also possess RCiEPs in addition to Root Ports. Those are allowed to be FLR-capable, but could also be reset through a platform-specific means. PCIe r6.3 page 121 defines the term "Root Complex Component", which encompasses Root Ports but also RCiEPs. So if you want to be super generic, you could use that term in lieu of Root Port, though it consumes more characters. Thanks, Lukas
