On Thu, Apr 24, 2025 at 03:50:52PM +0300, Leon Romanovsky wrote:
> On Thu, Apr 24, 2025 at 09:07:03AM -0300, Jason Gunthorpe wrote:
> > On Thu, Apr 24, 2025 at 11:46:26AM +0300, Leon Romanovsky wrote:
> > > On Thu, Apr 24, 2025 at 10:11:01AM +0200, Christoph Hellwig wrote:
> > > > On Thu, Apr 24, 2025 at 11:07:44AM +0300, Leon Romanovsky wrote:
> > > > > > I see, so yes order occupies 5 bits [-4,-5,-6,-7,-8] and the
> > > > > > DMA_MAPPED overlaps, it should be 9 not 7 because of the backwardness.
> > > > >
> > > > > Thanks for the fix.
> > > >
> > > > Maybe we can use the chance to make the scheme less fragile? i.e.
> > > > put flags in the high bits and derive the first valid bit from the
> > > > pfn order?
> > >
> > > It can be done too. This is what I got:
> >
> > Use genmask:
>
> I can do it too, will change.
If you don't mind, I'll stick with my previous proposal.
GENMASK() alone is not enough and the best solution will include use
of FIELD_GET FIELD_PREP mocros. IMHO, that will make code unreadable.
The simple, clean and reliable bitfield OR operations much better fit
here.
Thanks
>
> >
> > enum hmm_pfn_flags {
> > HMM_FLAGS_START = BITS_PER_LONG - PAGE_SHIFT,
> > HMM_PFN_FLAGS = GENMASK(BITS_PER_LONG - 1, HMM_FLAGS_START),
> >
> > /* Output fields and flags */
> > HMM_PFN_VALID = 1UL << HMM_FLAGS_START + 0,
> > HMM_PFN_WRITE = 1UL << HMM_FLAGS_START + 1,
> > HMM_PFN_ERROR = 1UL << HMM_FLAGS_START + 2,
> > HMM_PFN_ORDER_MASK = GENMASK(HMM_FLAGS_START + 7, HMM_FLAGS_START + 3),
> >
> > /* Input flags */
> > HMM_PFN_REQ_FAULT = HMM_PFN_VALID,
> > HMM_PFN_REQ_WRITE = HMM_PFN_WRITE,
> > };
> >
> > Jason
>
