On 2025-04-22 18:41, Bjorn Helgaas wrote:
On Tue, Apr 01, 2025 at 10:17:07AM +0100, Marc Zyngier wrote:
T602x seems to have dropped the rather useful SET/CLR accessors
to the masking register.
Instead, let's use the mask register directly, and wrap it with
a brand new spinlock. No, this isn't moving in the right direction.
@@ -261,14 +262,16 @@ static void apple_port_irq_mask(struct irq_data
*data)
{
struct apple_pcie_port *port = irq_data_get_irq_chip_data(data);
- writel_relaxed(BIT(data->hwirq), port->base + PORT_INTMSKSET);
+ guard(raw_spinlock_irqsave)(&port->lock);
+ rmw_set(BIT(data->hwirq), port->base + PORT_INTMSK);
sparse v0.6.4-39-gce1a6720 complains about this (and similar usage
elsewhere):
$ make C=2 drivers/pci/
drivers/pci/controller/pcie-apple.c:311:13: warning: context
imbalance in 'apple_port_irq_mask' - wrong count at exit
drivers/pci/controller/pcie-apple.c:319:13: warning: context
imbalance in 'apple_port_irq_unmask' - wrong count at exit
But I guess we just have to live with this for now until somebody
makes sparse smarter:
https://lore.kernel.org/linux-sparse/CAHk-=wiVDZejo_1BhOaR33qb=pny7sWnYtP4JUbRTXkXCkW6jA@xxxxxxxxxxxxxx/
Nothing to do, just "huh".
Huh indeed. Pretty sad to see a useful piece of tooling being left
on the curb.
GSoC project?
M.
--
Jazz is not dead. It just smells funny...
