From: Hans Zhang <hans.zhang@xxxxxxxxxxx> Enhances the exiting Cadence PCIe controller drivers to support HPA (High Performance Architecture) Cadence PCIe controllers. The patch set enhances the Cadence PCIe driver for HPA support. The "compatible" property in DTS is added with more enum to support the new platform architecture and the register maps that change with it. The driver read register and write register functions take the updated offset stored from the platform driver to access the registers. The driver now supports the legacy and HPA architecture, with the legacy code changes beingminimal. SoC related changes are not available in this patch set. The TI SoC continues to be supported with the changes incorporated. The changes are also in tune with how multiple platforms are supported in related drivers. The scripts/checkpatch.pl has been run on the patches with and without --strict. With the --strict option, 4 checks are generated on 1 patch (PATCH v3 3/6) of the series), which can be ignored. There are no code fixes required for these checks. The rest of the 'scripts/checkpatch.pl' is clean. The ./scripts/kernel-doc --none have been run on the changed files. The changes are tested on TI platforms. The legacy controller changes are tested on an TI J7200 EVM and HPA changes are planned for on an FPGA platform available within Cadence. The patch set has been version v3, though the earlier two versions had issues with threading. The previous submitted patch links is at https://lore.kernel.org/lkml/fc1c6ded-2246-4d09-90b4-c0a264962ab3@xxxxxxxxxx/ Changes for v3: - Patch version v3 added to the subject - Use HPA tag for architecture descriptions - Remove bug related changes to be submitted later as a separate patch - Two patches merged from the last series to ensure readability to address the review comments - Fix several description related issues, coding style issues and some misleading comments - Remove cpu_addr_fixup() functions Manikandan K Pillai (6): dt-bindings: pci: cadence: Extend compatible for new RP configuration dt-bindings: pci: cadence: Extend compatible for new EP configurations PCI: cadence: Add header support for PCIe HPA controller PCI: cadence: Add support for PCIe Endpoint HPA controller PCI: cadence: Add callback functions for RP and EP controller PCI: cadence: Update support for TI J721e boards .../bindings/pci/cdns,cdns-pcie-ep.yaml | 6 +- .../bindings/pci/cdns,cdns-pcie-host.yaml | 6 +- drivers/pci/controller/cadence/pci-j721e.c | 12 + .../pci/controller/cadence/pcie-cadence-ep.c | 170 +++++++-- .../controller/cadence/pcie-cadence-host.c | 284 +++++++++++++-- .../controller/cadence/pcie-cadence-plat.c | 110 ++++++ drivers/pci/controller/cadence/pcie-cadence.c | 196 ++++++++++- drivers/pci/controller/cadence/pcie-cadence.h | 332 +++++++++++++++++- 8 files changed, 1054 insertions(+), 62 deletions(-) base-commit: a24588245776dafc227243a01bfbeb8a59bafba9 -- 2.47.1
