Hi Shawn, kernel test robot noticed the following build warnings: [auto build test WARNING on pci/next] [also build test WARNING on pci/for-linus linus/master v6.15-rc1 next-20250410] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Shawn-Lin/PCI-dw-rockchip-Add-system-PM-support/20250410-145426 base: https://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git next patch link: https://lore.kernel.org/r/1744267805-119602-1-git-send-email-shawn.lin%40rock-chips.com patch subject: [PATCH] PCI: dw-rockchip: Add system PM support config: x86_64-buildonly-randconfig-001-20250411 (https://download.01.org/0day-ci/archive/20250411/202504111625.Eds7X9BC-lkp@xxxxxxxxx/config) compiler: gcc-11 (Debian 11.3.0-12) 11.3.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250411/202504111625.Eds7X9BC-lkp@xxxxxxxxx/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@xxxxxxxxx> | Closes: https://lore.kernel.org/oe-kbuild-all/202504111625.Eds7X9BC-lkp@xxxxxxxxx/ All warnings (new ones prefixed by >>): >> drivers/pci/controller/dwc/pcie-dw-rockchip.c:749:12: warning: 'rockchip_pcie_resume' defined but not used [-Wunused-function] 749 | static int rockchip_pcie_resume(struct device *dev) | ^~~~~~~~~~~~~~~~~~~~ >> drivers/pci/controller/dwc/pcie-dw-rockchip.c:725:12: warning: 'rockchip_pcie_suspend' defined but not used [-Wunused-function] 725 | static int rockchip_pcie_suspend(struct device *dev) | ^~~~~~~~~~~~~~~~~~~~~ vim +/rockchip_pcie_resume +749 drivers/pci/controller/dwc/pcie-dw-rockchip.c 724 > 725 static int rockchip_pcie_suspend(struct device *dev) 726 { 727 struct rockchip_pcie *rockchip = dev_get_drvdata(dev); 728 struct dw_pcie *pci = &rockchip->pci; 729 int ret; 730 731 rockchip->intx = rockchip_pcie_readl_apb(rockchip, PCIE_CLIENT_INTR_MASK_LEGACY); 732 733 ret = dw_pcie_suspend_noirq(pci); 734 if (ret) { 735 dev_err(dev, "failed to suspend\n"); 736 return ret; 737 } 738 739 rockchip_pcie_phy_deinit(rockchip); 740 clk_bulk_disable_unprepare(rockchip->clk_cnt, rockchip->clks); 741 reset_control_assert(rockchip->rst); 742 if (rockchip->vpcie3v3) 743 regulator_disable(rockchip->vpcie3v3); 744 gpiod_set_value_cansleep(rockchip->rst_gpio, 0); 745 746 return 0; 747 } 748 > 749 static int rockchip_pcie_resume(struct device *dev) 750 { 751 struct rockchip_pcie *rockchip = dev_get_drvdata(dev); 752 struct dw_pcie *pci = &rockchip->pci; 753 int ret; 754 755 reset_control_assert(rockchip->rst); 756 757 ret = clk_bulk_prepare_enable(rockchip->clk_cnt, rockchip->clks); 758 if (ret) { 759 dev_err(dev, "clock init failed\n"); 760 goto err_clk; 761 } 762 763 if (rockchip->vpcie3v3) { 764 ret = regulator_enable(rockchip->vpcie3v3); 765 if (ret) 766 goto err_power; 767 } 768 769 ret = phy_init(rockchip->phy); 770 if (ret) { 771 dev_err(dev, "fail to init phy\n"); 772 goto err_phy_init; 773 } 774 775 ret = phy_power_on(rockchip->phy); 776 if (ret) { 777 dev_err(dev, "fail to power on phy\n"); 778 goto err_phy_on; 779 } 780 781 reset_control_deassert(rockchip->rst); 782 783 rockchip_pcie_writel_apb(rockchip, HIWORD_UPDATE(0xffff, rockchip->intx), 784 PCIE_CLIENT_INTR_MASK_LEGACY); 785 786 rockchip_pcie_ltssm_enable_control_mode(rockchip, PCIE_CLIENT_RC_MODE); 787 rockchip_pcie_unmask_dll_indicator(rockchip); 788 789 ret = dw_pcie_resume_noirq(pci); 790 if (ret) { 791 dev_err(dev, "fail to resume\n"); 792 goto err_resume; 793 } 794 795 return 0; 796 797 err_resume: 798 phy_power_off(rockchip->phy); 799 err_phy_on: 800 phy_exit(rockchip->phy); 801 err_phy_init: 802 if (rockchip->vpcie3v3) 803 regulator_disable(rockchip->vpcie3v3); 804 err_power: 805 clk_bulk_disable_unprepare(rockchip->clk_cnt, rockchip->clks); 806 err_clk: 807 reset_control_deassert(rockchip->rst); 808 return ret; 809 } 810 -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki
