On Mon, Apr 07, 2025 at 05:10:29PM +0530, Aneesh Kumar K.V wrote: > I was trying to prototype this using kvmtool and I have run into some > issues. First i needed the below change for vIOMMU alloc to work > > modified drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > @@ -4405,6 +4405,8 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu) > reg = readl_relaxed(smmu->base + ARM_SMMU_IDR3); > if (FIELD_GET(IDR3_RIL, reg)) > smmu->features |= ARM_SMMU_FEAT_RANGE_INV; > + if (FIELD_GET(IDR3_FWB, reg)) > + smmu->features |= ARM_SMMU_FEAT_S2FWB; > > /* IDR5 */ > reg = readl_relaxed(smmu->base + ARM_SMMU_IDR5); Oh wow, I don't know what happened there that the IDR3 got dropped maybe a rebase mistake? It was in earlier versions of the patch at least :\ Please send a formal patch!! > Also current code don't allow a Stage 1 bypass, Stage2 translation when > allocating HWPT. > > arm_vsmmu_alloc_domain_nested -> arm_smmu_validate_vste -> > > cfg = FIELD_GET(STRTAB_STE_0_CFG, le64_to_cpu(arg->ste[0])); > if (cfg != STRTAB_STE_0_CFG_ABORT && cfg != STRTAB_STE_0_CFG_BYPASS && > cfg != STRTAB_STE_0_CFG_S1_TRANS) > return -EIO; > > This only allow a abort or bypass or stage1 translate/stage2 bypass config The above is for the vSTE, the cfg is not copied as is to the host STE. See how arm_smmu_make_nested_domain_ste() transforms it. STRTAB_STE_0_CFG_ABORT blocks all DMA STRTAB_STE_0_CFG_BYPASS "bypass" for the VM is S2 translation only STRTAB_STE_0_CFG_S1_TRANS "s1 only" for the VM is S1 & S1 translation > Also if we don't need stage1 table, what will > iommufd_viommu_alloc_hwpt_nested() return? A wrapper around whatever STE configuration that userspace requested logically linked to the viommu. Jason
