Hi,
On 2025-05-27 at 05:51:38, Dan Carpenter (dan.carpenter@xxxxxxxxxx) wrote:
> The "freq" variable is in terms of MHz and "max_val_cycles" is in terms
> of Hz. The fact that "max_val_cycles" is a u64 suggests that support
> for high frequency is intended but the "freq_khz * 1000" would overflow
> the u32 type if we went above 4GHz. Use unsigned long type for the
> mutliplication to prevent that.
>
> Fixes: 31c128b66e5b ("net/mlx4_en: Choose time-stamping shift value according to HW frequency")
> Signed-off-by: Dan Carpenter <dan.carpenter@xxxxxxxxxx>
> ---
> drivers/net/ethernet/mellanox/mlx4/en_clock.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/net/ethernet/mellanox/mlx4/en_clock.c b/drivers/net/ethernet/mellanox/mlx4/en_clock.c
> index cd754cd76bde..7abd6a7c9ebe 100644
> --- a/drivers/net/ethernet/mellanox/mlx4/en_clock.c
> +++ b/drivers/net/ethernet/mellanox/mlx4/en_clock.c
> @@ -249,7 +249,7 @@ static const struct ptp_clock_info mlx4_en_ptp_clock_info = {
> static u32 freq_to_shift(u16 freq)
> {
> u32 freq_khz = freq * 1000;
> - u64 max_val_cycles = freq_khz * 1000 * MLX4_EN_WRAP_AROUND_SEC;
> + u64 max_val_cycles = freq_khz * 1000UL * MLX4_EN_WRAP_AROUND_SEC;
1000ULL would be better then.
Thanks,
Sundeep
> u64 max_val_cycles_rounded = 1ULL << fls64(max_val_cycles - 1);
> /* calculate max possible multiplier in order to fit in 64bit */
> u64 max_mul = div64_u64(ULLONG_MAX, max_val_cycles_rounded);
> --
> 2.47.2
>
