Re: [PATCH v4] ata: libata: disable LPM for WDC WD20EFAX-68FB5N0 hard drives

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On 5/6/25 2:09 AM, Mikko Juhani Korhonen wrote:
> ma 5.5.2025 klo 18.37 Niklas Cassel (cassel@xxxxxxxxxx) kirjoitti:
> 
>> On Mon, May 05, 2025 at 10:58:22AM +0300, Mikko Juhani Korhonen wrote:
>>>>> On 5/1/25 05:36, Ioannis Barkas wrote:
>>>>>> It would be better to have more details on this since only the 2TB
>>>>>> model is targeted.
>>> I have two WD20EFAX-68FB5N0 and both behave consistently, unusable
>>> from 6.9.0 on as they just keep resetting the SATA link , but they
>>> have worked flawlessly with 6.8.x for a year and also now with the
>>> quirk applied.
>>> I have also tested a different WDC model with med_power_with_dipm on
>>> the same SATA port and there are no problems.
>>> But after you guys got suspicious I found there is in fact a SATA port
>>> on my motherboard where the WD20EFAX-68FB5N0 works with LPM on
>> This motherboard looks to be AMD chipset, so I assume AMD AHCI controller.
>>
>> Could you send the output of:
>> $ lspci -nn | grep -E "SATA|AHCI"
> 
> mjkorhon@taavi:~$ sudo lspci -nn | grep -E "SATA|AHCI"
> 01:00.1 SATA controller [0106]: Advanced Micro Devices, Inc. [AMD] 500
> Series Chipset SATA Controller [1022:43eb]

Mikko,

could you also please try this patch on top of a vanilla 6.15 kernel (no quirk
patch applied) ?

diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 163ac909bd06..a09b7b825780 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -52,6 +52,7 @@ enum board_ids {
        board_ahci_ign_iferr,
        board_ahci_no_debounce_delay,
        board_ahci_no_msi,
+       board_ahci_no_dipm,
        /*
         * board_ahci_pcs_quirk is for legacy Intel platforms.
         * Modern Intel platforms should use board_ahci instead.
@@ -152,6 +153,12 @@ static const struct ata_port_info ahci_port_info[] = {
                .udma_mask      = ATA_UDMA6,
                .port_ops       = &ahci_ops,
        },
+       [board_ahci_no_dipm] = {
+               .flags          = AHCI_FLAG_COMMON | ATA_FLAG_NO_DIPM,
+               .pio_mask       = ATA_PIO4,
+               .udma_mask      = ATA_UDMA6,
+               .port_ops       = &ahci_ops,
+       },
        [board_ahci_no_msi] = {
                AHCI_HFLAGS     (AHCI_HFLAG_NO_MSI),
                .flags          = AHCI_FLAG_COMMON,
@@ -466,6 +473,7 @@ static const struct pci_device_id ahci_pci_tbl[] = {
        { PCI_VDEVICE(AMD, 0x7801), board_ahci_no_debounce_delay }, /* AMD
Hudson-2 (AHCI mode) */
        { PCI_VDEVICE(AMD, 0x7900), board_ahci }, /* AMD CZ */
        { PCI_VDEVICE(AMD, 0x7901), board_ahci }, /* AMD Green Sardine */
+       { PCI_VDEVICE(AMD, 0x43EB), board_ahci_no_dipm }, /* 500 Series Chipset */
        /* AMD is using RAID class only for ahci controllers */
        { PCI_VENDOR_ID_AMD, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
          PCI_CLASS_STORAGE_RAID << 8, 0xffffff, board_ahci },


-- 
Damien Le Moal
Western Digital Research




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