> > This option can waste memory in small systems or systems with 64k base > > page size. So make it an opt-in and also add an option from individual > > architecture so that we don't enable this feature for larger base page > > size systems. > > Can you please help me understand why will there be memory waste with > 64k base pagesize, if this feature gets enabled? > > Is it because systems with 64k base pagsize can have a much larger PMD > size then 2M and hence this static huge folio won't really get used? Yeah, exactly. More than 2M seems to be excessive for zeroing. > > Just want to understand this better. On Power with Radix MMU, PMD size > is still 2M, but with Hash it can be 16M. > So I was considering if we should enable this with Radix. Hence the ask > to better understand this. I enabled only for x86 as a part of this series to reduce the scope. But the idea is to enable for all architectures with reasonable PMD size, like ARM with 4k, Power with Radix MMU, etc. Once we get the base patches up, I can follow up with enabling for those architectures. -- Pankaj
