Hi Reinette,
On 8/7/2025 8:47 PM, Reinette Chatre wrote:
Hi Babu,
On 8/5/25 4:30 PM, Babu Moger wrote:
"io_alloc" enables direct insertion of data from I/O devices into the
cache.
On AMD systems, "io_alloc" feature is backed by L3 Smart Data Cache
Injection Allocation Enforcement (SDCIAE). Change SDCIAE state by setting
(to enable) or clearing (to disable) bit 1 of MSR L3_QOS_EXT_CFG on all
logical processors within the cache domain.
Introduce architecture-specific call to enable and disable the feature.
The SDCIAE feature details are available in APM listed below [1].
[1] AMD64 Architecture Programmer's Manual Volume 2: System Programming
Publication # 24593 Revision 3.41 section 19.4.7 L3 Smart Data Cache
Injection Allocation Enforcement (SDCIAE)
Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537
fyi ... Documentation/process/maintainer-tip.rst has some examples how
the "Link:" can be associated with the changelog. For example, above could
be:
The SDCIAE feature details are available in APM [1] available
from [2].
[1] ...
Sure.
Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537 # [2]
Signed-off-by: Babu Moger <babu.moger@xxxxxxx>
---
Reviewed-by: Reinette Chatre <reinette.chatre@xxxxxxxxx>
Thanks
Babu
