Hi Babu, On 7/8/25 3:17 PM, Babu Moger wrote: > The ABMC feature allows users to assign a hardware counter to an RMID, > event pair and monitor bandwidth usage as long as it is assigned. The > hardware continues to track the assigned counter until it is explicitly > unassigned by the user. > > The ABMC feature implements an MSR L3_QOS_ABMC_CFG (C000_03FDh). > ABMC counter assignment is done by setting the counter id, bandwidth > source (RMID) and bandwidth configuration. > > Attempts to read or write the MSR when ABMC is not enabled will result > in a #GP(0) exception. > > Introduce the data structures and definitions for MSR L3_QOS_ABMC_CFG > (0xC000_03FDh): > ========================================================================= > Bits Mnemonic Description Access Reset > Type Value > ========================================================================= > 63 CfgEn Configuration Enable R/W 0 > > 62 CtrEn Enable/disable counting R/W 0 > > 61:53 – Reserved MBZ 0 > > 52:48 CtrID Counter Identifier R/W 0 > > 47 IsCOS BwSrc field is a CLOSID R/W 0 > (not an RMID) > > 46:44 – Reserved MBZ 0 > > 43:32 BwSrc Bandwidth Source R/W 0 > (RMID or CLOSID) > > 31:0 BwType Bandwidth configuration R/W 0 > tracked by the CtrID > ========================================================================== > > The feature details are documented in the APM listed below [1]. > [1] AMD64 Architecture Programmer's Manual Volume 2: System Programming > Publication # 24593 Revision 3.41 section 19.3.3.3 Assignable Bandwidth > Monitoring (ABMC). > > Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537 > Signed-off-by: Babu Moger <babu.moger@xxxxxxx> > --- Reviewed-by: Reinette Chatre <reinette.chatre@xxxxxxxxx> Reinette
