Hi, On Mon Jul 14, 2025 at 3:09 PM CEST, Andrew Lunn wrote: > On Mon, Jul 14, 2025 at 12:01:22PM +0200, Michael Walle wrote: > > On Tue Jun 24, 2025 at 12:53 PM CEST, Matthias Schiffer wrote: > > > All am65-cpsw controllers have a fixed TX delay, so the PHY interface > > > mode must be fixed up to account for this. > > > > > > Modes that claim to a delay on the PCB can't actually work. Warn people > > > to update their Device Trees if one of the unsupported modes is specified. > > > > > > Signed-off-by: Matthias Schiffer <matthias.schiffer@xxxxxxxxxxxxxxx> > > > Reviewed-by: Maxime Chevallier <maxime.chevallier@xxxxxxxxxxx> > > > Reviewed-by: Andrew Lunn <andrew@xxxxxxx> > > > > For whatever reason, this patch is breaking network on our board > > (just transmission). We have rgmii-id in our devicetree which is now > > modified to be just rgmii-rxid. The board has a TI AM67A (J722S) with a > > Broadcom BCM54210E PHY. I'm not sure, if AM67A MAC doesn't add any > > delay or if it's too small. I'll need to ask around if there are any > > measurements but my colleague doing the measurements is on holiday > > at the moment. > > I agree, we need to see if this is a AM65 vs AM67 issue. rgmii-id > would be correct if the MAC is not adding delays. > > Do you have access to the datasheets for both? Can you do a side by > side comparison for the section which describes the fixed TX delay? The datasheets and TRMs of the SoC are public of the SoC. According to the AM67A TRM the delay should be 1.2ns if I'm reading it correctly. The BCM PHY requires a setup time of -0.9ns (min). So, is should work (?), but it doesn't. I'm also not aware of any routing skew between the signals. But as I said, I'll have to check with my colleague next week. -michael
