On Thu, Jul 10, 2025 at 12:16:15PM -0500, Babu Moger wrote: > Smart Data Cache Injection (SDCI) is a mechanism that enables direct > insertion of data from I/O devices into the L3 cache. By directly caching > data from I/O devices rather than first storing the I/O data in DRAM, > SDCI reduces demands on DRAM bandwidth and reduces latency to the processor > consuming the I/O data. > > The SDCIAE (SDCI Allocation Enforcement) PQE feature allows system software > to control the portion of the L3 cache used for SDCI. > > When enabled, SDCIAE forces all SDCI lines to be placed into the L3 cache > partitions identified by the highest-supported L3_MASK_n register, where n > is the maximum supported CLOSID. > > Add CPUID feature bit that can be used to configure SDCIAE. > > The feature details are documented in APM listed below [1]. > [1] AMD64 Architecture Programmer's Manual Volume 2: System Programming > Publication # 24593 Revision 3.41 section 19.4.7 L3 Smart Data Cache > Injection Allocation Enforcement (SDCIAE) > > Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537 > Signed-off-by: Babu Moger <babu.moger@xxxxxxx> > --- > v7: No changes. Fixed few conflicts in > arch/x86/include/asm/cpufeatures.h > arch/x86/kernel/cpu/scattered.c > > v6: Resolved conflicts in cpufeatures.h. > > v5: No changes. > > v4: Resolved a minor conflict in cpufeatures.h. > > v3: No changes. > > v2: Added dependancy on X86_FEATURE_CAT_L3 > Removed the "" in CPU feature definition. > Minor text changes. > --- > arch/x86/include/asm/cpufeatures.h | 1 + > arch/x86/kernel/cpu/cpuid-deps.c | 1 + > arch/x86/kernel/cpu/scattered.c | 1 + > 3 files changed, 3 insertions(+) Acked-by: Borislav Petkov (AMD) <bp@xxxxxxxxx> -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette
