On Mon, Jul 07, 2025 at 01:11:00PM +0530, Vasant Hegde wrote:
> Hi ,
>
>
> On 7/5/2025 6:43 AM, Nicolin Chen wrote:
> > Introduce a new IOMMUFD_CMD_HW_QUEUE_ALLOC ioctl for user space to allocate
> > a HW QUEUE object for a vIOMMU specific HW-accelerated queue, e.g.:
> > - NVIDIA's Virtual Command Queue
> > - AMD vIOMMU's Command Buffer, Event Log Buffers, and PPR Log Buffers
> >
> > Since this is introduced with NVIDIA's VCMDQs that access the guest memory
> > in the physical address space, add an iommufd_hw_queue_alloc_phys() helper
> > that will create an access object to the queue memory in the IOAS, to avoid
> > the mappings of the guest memory from being unmapped, during the life cycle
> > of the HW queue object.
> >
> > AMD's HW will need an hw_queue_init op that is mutually exclusive with the
> > hw_queue_init_phys op, and their case will bypass the access part, i.e. no
> > iommufd_hw_queue_alloc_phys() call.
>
> Thanks. We will implement hw_queue_init[_iova] to support AMD driver and fixup
> iommufd_hw_queue_alloc_ioctl(). Is that the correct understanding?
Yes. I think just a simple "hw_queue_init" will be good as the
object structure stores "iova" already:
struct iommufd_hw_queue {
...
u64 base_addr; /* in guest physical address space */
...
};
Thanks
Nicolin
