Wed, Jul 02, 2025 at 01:49:22PM +0200, ivecera@xxxxxxxxxx wrote:
>
>
>On 02. 07. 25 12:57 odp., Jiri Pirko wrote:
>> Sun, Jun 29, 2025 at 09:10:44PM +0200, ivecera@xxxxxxxxxx wrote:
>>
>> [...]
>>
>> > +/**
>> > + * zl3073x_dpll_device_register - register DPLL device
>> > + * @zldpll: pointer to zl3073x_dpll structure
>> > + *
>> > + * Registers given DPLL device into DPLL sub-system.
>> > + *
>> > + * Return: 0 on success, <0 on error
>> > + */
>> > +static int
>> > +zl3073x_dpll_device_register(struct zl3073x_dpll *zldpll)
>> > +{
>> > + struct zl3073x_dev *zldev = zldpll->dev;
>> > + u8 dpll_mode_refsel;
>> > + int rc;
>> > +
>> > + /* Read DPLL mode and forcibly selected reference */
>> > + rc = zl3073x_read_u8(zldev, ZL_REG_DPLL_MODE_REFSEL(zldpll->id),
>> > + &dpll_mode_refsel);
>> > + if (rc)
>> > + return rc;
>> > +
>> > + /* Extract mode and selected input reference */
>> > + zldpll->refsel_mode = FIELD_GET(ZL_DPLL_MODE_REFSEL_MODE,
>> > + dpll_mode_refsel);
>>
>> Who sets this?
>
>WDYM? refsel_mode register? If so this register is populated from
>configuration stored in flash inside the chip. And the configuration
>is prepared by vendor/OEM.
Okay. Any plan to implement on-fly change of this?
>
>> > + zldpll->forced_ref = FIELD_GET(ZL_DPLL_MODE_REFSEL_REF,
>> > + dpll_mode_refsel);
>> > +
>> > + zldpll->dpll_dev = dpll_device_get(zldev->clock_id, zldpll->id,
>> > + THIS_MODULE);
>> > + if (IS_ERR(zldpll->dpll_dev)) {
>> > + rc = PTR_ERR(zldpll->dpll_dev);
>> > + zldpll->dpll_dev = NULL;
>> > +
>> > + return rc;
>> > + }
>> > +
>> > + rc = dpll_device_register(zldpll->dpll_dev,
>> > + zl3073x_prop_dpll_type_get(zldev, zldpll->id),
>> > + &zl3073x_dpll_device_ops, zldpll);
>> > + if (rc) {
>> > + dpll_device_put(zldpll->dpll_dev);
>> > + zldpll->dpll_dev = NULL;
>> > + }
>> > +
>> > + return rc;
>> > +}
>>
>> [...]
>>
>
