Re: [PATCHv2 3/3] x86/64/mm: Make 5-level paging support unconditional

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* Borislav Petkov <bp@xxxxxxxxx> wrote:

> On Fri, May 16, 2025 at 12:15:33PM +0300, Kirill A. Shutemov wrote:
> > @@ -173,10 +173,10 @@ For example, when an old kernel is running on new hardware.
> >  The kernel disabled support for it at compile-time
> >  --------------------------------------------------
> >  
> > -For example, if 5-level-paging is not enabled when building (i.e.,
> > -CONFIG_X86_5LEVEL is not selected) the flag "la57" will not show up [#f1]_.
> > +For example, if Linear Address Masking (LAM) is not enabled when building (i.e.,
> > +CONFIG_ADDRESS_MASKING is not selected) the flag "lam" will not show up.
> >  Even though the feature will still be detected via CPUID, the kernel disables
> > -it by clearing via setup_clear_cpu_cap(X86_FEATURE_LA57).
> > +it by clearing via setup_clear_cpu_cap(X86_FEATURE_LAM).
> 
> LOL, good one.
> 
> The rest looks nice and good to me. And FWIW, it boots fine on my Zen5 with
> 5lvl enabled.
> 
> Reviewed-by: Borislav Petkov (AMD) <bp@xxxxxxxxx>

What's your preference on timing? v6.17 or v6.16?

Thanks,

	Ingo




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