On 16.05.25 11:15, Kirill A. Shutemov wrote:
Both Intel and AMD CPUs support 5-level paging, which is expected to become more widely adopted in the future. Remove CONFIG_X86_5LEVEL and ifdeffery for it to make it more readable. Signed-off-by: Kirill A. Shutemov <kirill.shutemov@xxxxxxxxxxxxxxx> Suggested-by: Borislav Petkov <bp@xxxxxxxxx> --- Documentation/arch/x86/cpuinfo.rst | 8 +++---- .../arch/x86/x86_64/5level-paging.rst | 9 -------- arch/x86/Kconfig | 22 +------------------ arch/x86/Kconfig.cpufeatures | 4 ---- arch/x86/boot/compressed/pgtable_64.c | 11 ++-------- arch/x86/boot/header.S | 4 ---- arch/x86/boot/startup/map_kernel.c | 5 +---- arch/x86/include/asm/page_64.h | 2 -- arch/x86/include/asm/page_64_types.h | 7 ------ arch/x86/include/asm/pgtable_64_types.h | 18 --------------- arch/x86/kernel/alternative.c | 2 +- arch/x86/kernel/head64.c | 2 -- arch/x86/kernel/head_64.S | 2 -- arch/x86/mm/init.c | 4 ---- arch/x86/mm/pgtable.c | 2 +- drivers/firmware/efi/libstub/x86-5lvl.c | 2 +- 16 files changed, 10 insertions(+), 94 deletions(-)
There are some instances of: #if CONFIG_PGTABLE_LEVELS >= 5 in 64-bit-only code under arch/x86, which could be simplified, too. They are still correct, but I wanted to hint at further code removals being possible. Juergen
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