tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: 02ddfb981de88a2c15621115dd7be2431252c568 commit: 08502cebee7c54d58fee0a54a98064dade4cc4de drm/amd/display: Add DCN401 dependant changes for DMCUB date: 1 year ago config: sparc64-randconfig-001-20250426 (https://download.01.org/0day-ci/archive/20250426/202504262246.HqBWltOk-lkp@xxxxxxxxx/config) compiler: sparc64-linux-gcc (GCC) 7.5.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250426/202504262246.HqBWltOk-lkp@xxxxxxxxx/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@xxxxxxxxx> | Closes: https://lore.kernel.org/oe-kbuild-all/202504262246.HqBWltOk-lkp@xxxxxxxxx/ All warnings (new ones prefixed by >>): >> drivers/gpu/drm/amd/amdgpu/../display/dmub/src/dmub_dcn401.c:79: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * Timeout covers both the ACK and the wait drivers/gpu/drm/amd/amdgpu/../display/dmub/src/dmub_dcn401.c:283: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * outbox1 wptr register is accessed without locks (dal & dc) drivers/gpu/drm/amd/amdgpu/../display/dmub/src/dmub_dcn401.c:292: warning: This comment starts with '/**', but isn't a kernel-doc comment. Refer Documentation/doc-guide/kernel-doc.rst * outbox1 rptr register is accessed without locks (dal & dc) vim +79 drivers/gpu/drm/amd/amdgpu/../display/dmub/src/dmub_dcn401.c 70839da6360500 Aurabindo Pillai 2024-04-19 62 70839da6360500 Aurabindo Pillai 2024-04-19 63 void dmub_dcn401_reset(struct dmub_srv *dmub) 70839da6360500 Aurabindo Pillai 2024-04-19 64 { 70839da6360500 Aurabindo Pillai 2024-04-19 65 union dmub_gpint_data_register cmd; 70839da6360500 Aurabindo Pillai 2024-04-19 66 const uint32_t timeout = 30; 70839da6360500 Aurabindo Pillai 2024-04-19 67 uint32_t in_reset, scratch, i; 70839da6360500 Aurabindo Pillai 2024-04-19 68 70839da6360500 Aurabindo Pillai 2024-04-19 69 REG_GET(DMCUB_CNTL2, DMCUB_SOFT_RESET, &in_reset); 70839da6360500 Aurabindo Pillai 2024-04-19 70 70839da6360500 Aurabindo Pillai 2024-04-19 71 if (in_reset == 0) { 70839da6360500 Aurabindo Pillai 2024-04-19 72 cmd.bits.status = 1; 70839da6360500 Aurabindo Pillai 2024-04-19 73 cmd.bits.command_code = DMUB_GPINT__STOP_FW; 70839da6360500 Aurabindo Pillai 2024-04-19 74 cmd.bits.param = 0; 70839da6360500 Aurabindo Pillai 2024-04-19 75 70839da6360500 Aurabindo Pillai 2024-04-19 76 dmub->hw_funcs.set_gpint(dmub, cmd); 70839da6360500 Aurabindo Pillai 2024-04-19 77 70839da6360500 Aurabindo Pillai 2024-04-19 78 /** 70839da6360500 Aurabindo Pillai 2024-04-19 @79 * Timeout covers both the ACK and the wait 70839da6360500 Aurabindo Pillai 2024-04-19 80 * for remaining work to finish. 70839da6360500 Aurabindo Pillai 2024-04-19 81 * 70839da6360500 Aurabindo Pillai 2024-04-19 82 * This is mostly bound by the PHY disable sequence. 70839da6360500 Aurabindo Pillai 2024-04-19 83 * Each register check will be greater than 1us, so 70839da6360500 Aurabindo Pillai 2024-04-19 84 * don't bother using udelay. 70839da6360500 Aurabindo Pillai 2024-04-19 85 */ 70839da6360500 Aurabindo Pillai 2024-04-19 86 70839da6360500 Aurabindo Pillai 2024-04-19 87 for (i = 0; i < timeout; ++i) { 70839da6360500 Aurabindo Pillai 2024-04-19 88 if (dmub->hw_funcs.is_gpint_acked(dmub, cmd)) 70839da6360500 Aurabindo Pillai 2024-04-19 89 break; 70839da6360500 Aurabindo Pillai 2024-04-19 90 } 70839da6360500 Aurabindo Pillai 2024-04-19 91 70839da6360500 Aurabindo Pillai 2024-04-19 92 for (i = 0; i < timeout; ++i) { 70839da6360500 Aurabindo Pillai 2024-04-19 93 scratch = dmub->hw_funcs.get_gpint_response(dmub); 70839da6360500 Aurabindo Pillai 2024-04-19 94 if (scratch == DMUB_GPINT__STOP_FW_RESPONSE) 70839da6360500 Aurabindo Pillai 2024-04-19 95 break; 70839da6360500 Aurabindo Pillai 2024-04-19 96 } 70839da6360500 Aurabindo Pillai 2024-04-19 97 70839da6360500 Aurabindo Pillai 2024-04-19 98 /* Force reset in case we timed out, DMCUB is likely hung. */ 70839da6360500 Aurabindo Pillai 2024-04-19 99 } 70839da6360500 Aurabindo Pillai 2024-04-19 100 70839da6360500 Aurabindo Pillai 2024-04-19 101 REG_UPDATE(DMCUB_CNTL2, DMCUB_SOFT_RESET, 1); 70839da6360500 Aurabindo Pillai 2024-04-19 102 REG_UPDATE(DMCUB_CNTL, DMCUB_ENABLE, 0); 70839da6360500 Aurabindo Pillai 2024-04-19 103 REG_UPDATE(MMHUBBUB_SOFT_RESET, DMUIF_SOFT_RESET, 1); 70839da6360500 Aurabindo Pillai 2024-04-19 104 REG_WRITE(DMCUB_INBOX1_RPTR, 0); 70839da6360500 Aurabindo Pillai 2024-04-19 105 REG_WRITE(DMCUB_INBOX1_WPTR, 0); 70839da6360500 Aurabindo Pillai 2024-04-19 106 REG_WRITE(DMCUB_OUTBOX1_RPTR, 0); 70839da6360500 Aurabindo Pillai 2024-04-19 107 REG_WRITE(DMCUB_OUTBOX1_WPTR, 0); 70839da6360500 Aurabindo Pillai 2024-04-19 108 REG_WRITE(DMCUB_OUTBOX0_RPTR, 0); 70839da6360500 Aurabindo Pillai 2024-04-19 109 REG_WRITE(DMCUB_OUTBOX0_WPTR, 0); 70839da6360500 Aurabindo Pillai 2024-04-19 110 REG_WRITE(DMCUB_SCRATCH0, 0); 70839da6360500 Aurabindo Pillai 2024-04-19 111 70839da6360500 Aurabindo Pillai 2024-04-19 112 /* Clear the GPINT command manually so we don't reset again. */ 70839da6360500 Aurabindo Pillai 2024-04-19 113 cmd.all = 0; 70839da6360500 Aurabindo Pillai 2024-04-19 114 dmub->hw_funcs.set_gpint(dmub, cmd); 70839da6360500 Aurabindo Pillai 2024-04-19 115 } 70839da6360500 Aurabindo Pillai 2024-04-19 116 :::::: The code at line 79 was first introduced by commit :::::: 70839da6360500a82e4d5f78499284474cbed7c1 drm/amd/display: Add new DCN401 sources :::::: TO: Aurabindo Pillai <aurabindo.pillai@xxxxxxx> :::::: CC: Alex Deucher <alexander.deucher@xxxxxxx> -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki
