Hi Marcelo, On 26.03.2025 19:28, Marcelo Schmitt wrote: > The doc seems to be all about the high-speed setup despite classical SPI support > being mentioned. It would be interesting to see how the regular SPI and hs > ad3552r IIO devices differ from each other (wiring connections, IIO device > interfaces (attributes, debug files, ...), any other relevant peculiarities). > Some comments about that inline. > had to add this file mainly to describe ramp generator usage. The ad3552r (classic SPI) is quite old stuff, may work with whatever controller with classic simple SPI (SDI/SDO/S_CLK/CS) so no particular wiring diagram or explainations should be needed. > On 03/21, Angelo Dureghello wrote: > > From: Angelo Dureghello <adureghello@xxxxxxxxxxxx> > > > > Add documentation for ad3552r driver, needed to describe the high-speed > > driver debugfs attributes and shows how the user may use them. > > > > Signed-off-by: Angelo Dureghello <adureghello@xxxxxxxxxxxx> > > --- > ... > > +============== > > +AD3552R driver > > +============== > > + > > +Device driver for Analog Devices Inc. AD35XXR series of DACs. The module name > > +is ``ad3552r``. > > +With the same module name, two different driver variants are available, the > > +``generic spi`` variant, to be used with any classic SPI controllers, and the > > +``hs`` (high speed) variant, for an ADI ``axi-dac`` (IP core) based controller > > +that allows to reach the maximum sample rate supported from the DACs, using the > > +DMA transfer and all the SPI lines available (D/QDSPI).. > Is D/QDSPI about dual and quad SPI? If so, what about saying that more clearly? > > > +The high speed driver variant is intended to be used with the ``adi-axi-dac`` > > +backend support enabled, that is enabled by default when the driver is selected. > > + > > +Supported devices > > +================= > > + > > +* `AD3541R <https://www.analog.com/en/products/ad3541r.html>`_ > > +* `AD3542R <https://www.analog.com/en/products/ad3542r.html>`_ > > +* `AD3551R <https://www.analog.com/en/products/ad3551r.html>`_ > > +* `AD3552R <https://www.analog.com/en/products/ad3552r.html>`_ > > + > > +Wiring connections > > +------------------ > > + > > +:: > > + > > + .-----------------. .-------. > > + | |--- D/QSPI -----| | > > + | DAC IP CORE |--- SPI S_CLK --| DAC | > > + | |--- SPI CS -----| | > > + | |--- LDAC -------| | > > + | |--- RESET ------| | > > + |_________________| |_______| > > This only describes how the HDL IP connects to the DAC which is the high speed > use case. Maybe add a diagram for the regular SPI connection wiring or say that > the above is only for the hs setup? > Also, what about adding a link to the HDL documentation page? > https://analogdevicesinc.github.io/hdl/projects/ad35xxr_evb/index.html > > > + > > + > > +High speed features > > +=================== > > + > > +Device attributes > > +----------------- > This is only describing the debugfs file. What about also listing the usual > IIO device channels and attributes (out_voltageX_raw, out_voltageX_en, ...)? > they are already documented, since part of the iio stuff. Please see Documentation/ABI/testing/sysfs-bus-iio. > > + > > +The following table shows the ad35xxr related device debug files, found in the > > +specific device debug folder path ``/sys/kernel/debug/iio/iio:deviceX``. > > + > > ++----------------------+-------------------------------------------------------+ > > +| Debugfs device files | Description | > > ++----------------------+-------------------------------------------------------+ > > +| data_source | The used data source, | > > +| | as ``iio-buffer`` or ``backend-ramp-generator``. | > > ++----------------------+-------------------------------------------------------+ > > + Reagrds, angelo
