On Thu, Aug 28, 2025 at 11:37:08PM +0800, Nick Chan wrote: > > Janne Grunau 於 2025/8/28 夜晚10:52 寫道: > > From: Hector Martin <marcan@xxxxxxxxx> > > > > These SoCs are found in Apple devices with M2 Pro (t6020), M2 Max > > (t6021) and M2 Ultra (t6022) and follow the pattern of their M1 > > counterparts. > > > > t6020 is a cut-down version of t6021, so the former just includes the > > latter and disables the missing bits (This is currently just one PMGR > > node and all of its domains. > > > > t6022 is two connected t6021 dies. The implementation seems to use > > t6021 with blocks disabled (mostly on the second die). MMIO addresses on > > the second die have a constant offset. The interrupt controller is > > multi-die aware. This setup can be represented in the device tree with > > two top level "soc" nodes. The MMIO offset is applied via "ranges" and > > devices are included with preproceesor macros to make the node labels > > unique and to specify the die number for the interrupt definition. > > > > Device nodes are distributed over dtsi files based on whether they are > > present on both dies or just on the first die. The only exception is the > > NVMe controller which resides on the second die. Its nodes are in a > > separate file. > > There are some outdated / copy pasted from M1-series parts. All fixed locally. I also removed an outdated "hypothetical T6022 (M2 Ultra)" from t602x-dieX.dtsi. thanks for spotting these, Janne
