Currently, users of Mediatek UFOe (Unified Frame Optimization engine) DT
bindings set mediatek,gce-client-reg node property, which is missing from
the DT schema.
For example, device tree arch/arm64/boot/dts/mediatek/mt8173.dtsi is
causing the following dtb check error:
```
$ make CHECK_DTBS=y mediatek/mt8173-elm.dtb
SCHEMA Documentation/devicetree/bindings/processed-schema.json
DTC [C] arch/arm64/boot/dts/mediatek/mt8173-elm.dtb
[...]
arch/arm64/boot/dts/mediatek/mt8173-elm.dtb: ufoe@1401a000
(mediatek,mt8173-disp-ufoe): 'mediatek,gce-client-reg' does not match
any of the regexes: '^pinctrl-[0-9]+$'
```
This commit adds the missing node property in the DT schema and updates the
example as well.
Signed-off-by: Ariel D'Alessandro <ariel.dalessandro@xxxxxxxxxxxxx>
---
.../bindings/display/mediatek/mediatek,ufoe.yaml | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,ufoe.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,ufoe.yaml
index 61a5e22effbf2..036a66ed42e73 100644
--- a/Documentation/devicetree/bindings/display/mediatek/mediatek,ufoe.yaml
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,ufoe.yaml
@@ -64,6 +64,18 @@ properties:
- port@0
- port@1
+ mediatek,gce-client-reg:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ description: describes how to locate the GCE client register
+ items:
+ - items:
+ - description: Phandle reference to a Mediatek GCE Mailbox
+ - description:
+ GCE subsys id mapping to a client defined in header
+ include/dt-bindings/gce/<chip>-gce.h.
+ - description: offset for the GCE register offset
+ - description: size of the GCE register offset
+
required:
- compatible
- reg
@@ -77,7 +89,9 @@ examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/mt8173-clk.h>
+ #include <dt-bindings/gce/mt8173-gce.h>
#include <dt-bindings/power/mt8173-power.h>
+
soc {
#address-cells = <2>;
#size-cells = <2>;
@@ -88,5 +102,6 @@ examples:
interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_LOW>;
power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
clocks = <&mmsys CLK_MM_DISP_UFOE>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0xa000 0x1000>;
};
};
--
2.50.1
