From: Tao Zhang <tao.zhang@xxxxxxxxxxxxxxxx>
The TPDA_SYNCR register defines the frequency at which TPDA generates
ASYNC packets, enabling userspace tools to accurately parse each valid
packet.
Signed-off-by: Tao Zhang <tao.zhang@xxxxxxxxxxxxxxxx>
Co-developed-by: Jie Gan <jie.gan@xxxxxxxxxxxxxxxx>
Signed-off-by: Jie Gan <jie.gan@xxxxxxxxxxxxxxxx>
---
drivers/hwtracing/coresight/coresight-tpda.c | 15 +++++++++++++++
drivers/hwtracing/coresight/coresight-tpda.h | 1 +
2 files changed, 16 insertions(+)
diff --git a/drivers/hwtracing/coresight/coresight-tpda.c b/drivers/hwtracing/coresight/coresight-tpda.c
index cc254d53b8ec..9e623732d1e7 100644
--- a/drivers/hwtracing/coresight/coresight-tpda.c
+++ b/drivers/hwtracing/coresight/coresight-tpda.c
@@ -189,6 +189,18 @@ static void tpda_enable_pre_port(struct tpda_drvdata *drvdata)
writel_relaxed(0x0, drvdata->base + TPDA_FPID_CR);
}
+static void tpda_enable_post_port(struct tpda_drvdata *drvdata)
+{
+ uint32_t val;
+
+ val = readl_relaxed(drvdata->base + TPDA_SYNCR);
+ /* Clear the mode */
+ val = val & ~TPDA_MODE_CTRL;
+ /* Program the counter value */
+ val = val | 0xFFF;
+ writel_relaxed(val, drvdata->base + TPDA_SYNCR);
+}
+
static int tpda_enable_port(struct tpda_drvdata *drvdata, int port)
{
u32 val;
@@ -227,6 +239,9 @@ static int __tpda_enable(struct tpda_drvdata *drvdata, int port)
tpda_enable_pre_port(drvdata);
ret = tpda_enable_port(drvdata, port);
+ if (!drvdata->csdev->refcnt)
+ tpda_enable_post_port(drvdata);
+
CS_LOCK(drvdata->base);
return ret;
diff --git a/drivers/hwtracing/coresight/coresight-tpda.h b/drivers/hwtracing/coresight/coresight-tpda.h
index b651372d4c88..00d146960d81 100644
--- a/drivers/hwtracing/coresight/coresight-tpda.h
+++ b/drivers/hwtracing/coresight/coresight-tpda.h
@@ -9,6 +9,7 @@
#define TPDA_CR (0x000)
#define TPDA_Pn_CR(n) (0x004 + (n * 4))
#define TPDA_FPID_CR (0x084)
+#define TPDA_SYNCR (0x08C)
/* Cross trigger FREQ packets timestamp bit */
#define TPDA_CR_FREQTS BIT(2)
--
2.34.1
