On Tue, Aug 26, 2025 at 02:06:52PM +0530, Jishnu Prakash wrote: > PMIC5 Gen3 has a similar ADC architecture to that on PMIC5 Gen2, > with all SW communication to ADC going through PMK8550 which > communicates with other PMICs through PBS. The major difference is > that the register interface used here is that of an SDAM present on > PMK8550, rather than a dedicated ADC peripheral. There may be more than one > SDAM used for ADC5 Gen3. Each ADC SDAM has eight channels, each of which may > be used for either immediate reads (same functionality as previous PMIC5 and > PMIC5 Gen2 ADC peripherals) or recurring measurements (same as PMIC5 and PMIC5 > Gen2 ADC_TM functionality). In this case, we have VADC and ADC_TM functionality > combined into the same driver. > > Patch 1 is a cleanup, to move the QCOM ADC dt-bindings files from > dt-bindings/iio to dt-bindings/iio/adc folder, as they are > specifically for ADC devices. It also fixes all compilation errors > with this change in driver and devicetree files and similar errors > in documentation for dtbinding check. > > Patch 2 splits out the common ADC channel properties used on older > VADC devices, which would also be reused on ADC5 Gen3. > > Patch 3 adds bindings for ADC5 Gen3 peripheral. > > Patch 4 adds the main driver for ADC5 Gen3. > > Patch 5 adds the auxiliary thermal driver which supports the ADC_TM > functionality of ADC5 Gen3. > > Changes since v6: > - Updated auxiliary device cleanup handling to fix memory freeing issues > - Updated copyright license in newly added files Eveyrthing is an update.... What did you change in copyright and license? And why? > - Addressed some reviewer comments in documentation and driver patches. What changed specifically? > - Link to v6: https://lore.kernel.org/all/20250509110959.3384306-1-jishnu.prakash@xxxxxxxxxxxxxxxx/ > Best regards, Krzysztof
