The DP PHYs on X1E80100 need the refclk which is provided
by the TCSR CC. So add it to the PHYs.
Cc: stable@xxxxxxxxxxxxxxx # v6.9
Fixes: 1940c25eaa63 ("arm64: dts: qcom: x1e80100: Add display nodes")
Signed-off-by: Abel Vesa <abel.vesa@xxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/x1e80100.dtsi | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
index 737c5dbd1c808300041cc8897ca1f7450e16e019..495356a7ebe662c68385a19ee0657033e44e0c7a 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
+++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
@@ -5670,9 +5670,11 @@ mdss_dp2_phy: phy@aec2a00 {
<0 0x0aec2000 0 0x1c8>;
clocks = <&dispcc DISP_CC_MDSS_DPTX2_AUX_CLK>,
- <&dispcc DISP_CC_MDSS_AHB_CLK>;
+ <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ <&tcsr TCSR_EDP_CLKREF_EN>;
clock-names = "aux",
- "cfg_ahb";
+ "cfg_ahb",
+ "refclk";
power-domains = <&rpmhpd RPMHPD_MX>;
@@ -5690,9 +5692,11 @@ mdss_dp3_phy: phy@aec5a00 {
<0 0x0aec5000 0 0x1c8>;
clocks = <&dispcc DISP_CC_MDSS_DPTX3_AUX_CLK>,
- <&dispcc DISP_CC_MDSS_AHB_CLK>;
+ <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ <&tcsr TCSR_EDP_CLKREF_EN>;
clock-names = "aux",
- "cfg_ahb";
+ "cfg_ahb",
+ "refclk";
power-domains = <&rpmhpd RPMHPD_MX>;
--
2.45.2
