On 9/8/25 10:36 AM, Stephan Gerhold wrote: > On Thu, Sep 04, 2025 at 04:31:23PM +0200, Konrad Dybcio wrote: >> From: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxxxx> >> >> The CCI clock has voltage requirements, which need to be described >> through an OPP table. >> >> The 1 MHz FAST_PLUS mode requires the CCI core clock runs at 37,5 MHz >> (which is a value common across all SoCs), since it's not possible to >> reach the required timings with the default 19.2 MHz rate. >> >> Address both issues by introducing an OPP table and using it to vote >> for the faster rate. >> >> Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxxxx> > > Using an OPP table for a single static rate that remains the same over > the whole lifetime of the driver feels like overkill to me. Couldn't you > just put the "required-opps" directly into the device node so that it is > automatically applied when the device goes in/out of runtime suspend? > > And since you need to make DT additions anyway, couldn't you just use > "assigned-clock-rates" to avoid the need for a driver patch entirely? We > use that for e.g. USB clocks as well. This is futureproofing, in case someone invents FastMode++ with a higher dvfs requirement or for when the driver adds presets for a 19.2 MHz CCI clock which would (marginally) decrease power consumption Konrad
