On Mon, Aug 04, 2025 at 06:15:36AM +0000, Raviteja Laggyshetty wrote:
> Add Operation State Manager (OSM) L3 interconnect provide node and OPP
> tables required to scale DDR and L3 per freq-domain on QCS615 SoC.
> As QCS615 and SM8150 SoCs have same OSM hardware, added SM8150
> compatible as fallback for QCS615 OSM device node.
>
> Depends-on: <20250702-qcs615-mm-cpu-dt-v4-v5-3-df24896cbb26@xxxxxxxxxxx>
Yuck. It's not a way to define dependencies.
> Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@xxxxxxxxxxxxxxxx>
> Signed-off-by: Imran Shaik <quic_imrashai@xxxxxxxxxxx>
And the comment regarding SoB chain wasn't addressed.
> ---
> arch/arm64/boot/dts/qcom/sm6150.dtsi | 148 +++++++++++++++++++++++++++
> 1 file changed, 148 insertions(+)
>
> };
> };
>
> + osm_l3: interconnect@18321000 {
> + compatible = "qcom,qcs615-osm-l3", "qcom,sm8150-osm-l3", "qcom,osm-l3";
> + reg = <0 0x18321000 0 0x1400>;
reg = <0x0 0x18321000 0x0 0x1400>;
> +
> + clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
> + clock-names = "xo", "alternate";
> +
> + #interconnect-cells = <1>;
> + };
> +
> usb_1_hsphy: phy@88e2000 {
> compatible = "qcom,qcs615-qusb2-phy";
> reg = <0x0 0x88e2000 0x0 0x180>;
> --
> 2.43.0
>
--
With best wishes
Dmitry
