Stop using fixed and IDs and covert the platform to use dynamic IDs for
the interconnect. This gives more flexibility and also allows us to drop
the .num_links member, saving from possible errors related to it being
not set or set incorrectly.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxxxxxxxx>
---
drivers/interconnect/qcom/sdx55.c | 554 +++++++++++++++++++-------------------
drivers/interconnect/qcom/sdx55.h | 70 -----
2 files changed, 275 insertions(+), 349 deletions(-)
diff --git a/drivers/interconnect/qcom/sdx55.c b/drivers/interconnect/qcom/sdx55.c
index af273e39eef3e90519635d1c310dc108a9f8b708..5d85c1e6ec58d3949b30c143440bb6dd0779a605 100644
--- a/drivers/interconnect/qcom/sdx55.c
+++ b/drivers/interconnect/qcom/sdx55.c
@@ -17,630 +17,623 @@
#include "bcm-voter.h"
#include "icc-rpmh.h"
-#include "sdx55.h"
+
+static struct qcom_icc_node llcc_mc;
+static struct qcom_icc_node acm_tcu;
+static struct qcom_icc_node qnm_snoc_gc;
+static struct qcom_icc_node xm_apps_rdwr;
+static struct qcom_icc_node qhm_audio;
+static struct qcom_icc_node qhm_blsp1;
+static struct qcom_icc_node qhm_qdss_bam;
+static struct qcom_icc_node qhm_qpic;
+static struct qcom_icc_node qhm_snoc_cfg;
+static struct qcom_icc_node qhm_spmi_fetcher1;
+static struct qcom_icc_node qnm_aggre_noc;
+static struct qcom_icc_node qnm_ipa;
+static struct qcom_icc_node qnm_memnoc;
+static struct qcom_icc_node qnm_memnoc_pcie;
+static struct qcom_icc_node qxm_crypto;
+static struct qcom_icc_node xm_emac;
+static struct qcom_icc_node xm_ipa2pcie_slv;
+static struct qcom_icc_node xm_pcie;
+static struct qcom_icc_node xm_qdss_etr;
+static struct qcom_icc_node xm_sdc1;
+static struct qcom_icc_node xm_usb3;
+static struct qcom_icc_node ebi;
+static struct qcom_icc_node qns_llcc;
+static struct qcom_icc_node qns_memnoc_snoc;
+static struct qcom_icc_node qns_sys_pcie;
+static struct qcom_icc_node qhs_aop;
+static struct qcom_icc_node qhs_aoss;
+static struct qcom_icc_node qhs_apss;
+static struct qcom_icc_node qhs_audio;
+static struct qcom_icc_node qhs_blsp1;
+static struct qcom_icc_node qhs_clk_ctl;
+static struct qcom_icc_node qhs_crypto0_cfg;
+static struct qcom_icc_node qhs_ddrss_cfg;
+static struct qcom_icc_node qhs_ecc_cfg;
+static struct qcom_icc_node qhs_emac_cfg;
+static struct qcom_icc_node qhs_imem_cfg;
+static struct qcom_icc_node qhs_ipa;
+static struct qcom_icc_node qhs_mss_cfg;
+static struct qcom_icc_node qhs_pcie_parf;
+static struct qcom_icc_node qhs_pdm;
+static struct qcom_icc_node qhs_prng;
+static struct qcom_icc_node qhs_qdss_cfg;
+static struct qcom_icc_node qhs_qpic;
+static struct qcom_icc_node qhs_sdc1;
+static struct qcom_icc_node qhs_snoc_cfg;
+static struct qcom_icc_node qhs_spmi_fetcher;
+static struct qcom_icc_node qhs_spmi_vgi_coex;
+static struct qcom_icc_node qhs_tcsr;
+static struct qcom_icc_node qhs_tlmm;
+static struct qcom_icc_node qhs_usb3;
+static struct qcom_icc_node qhs_usb3_phy;
+static struct qcom_icc_node qns_aggre_noc;
+static struct qcom_icc_node qns_snoc_memnoc;
+static struct qcom_icc_node qxs_imem;
+static struct qcom_icc_node srvc_snoc;
+static struct qcom_icc_node xs_pcie;
+static struct qcom_icc_node xs_qdss_stm;
+static struct qcom_icc_node xs_sys_tcu_cfg;
static struct qcom_icc_node llcc_mc = {
.name = "llcc_mc",
- .id = SDX55_MASTER_LLCC,
.channels = 4,
.buswidth = 4,
- .num_links = 1,
- .links = { SDX55_SLAVE_EBI_CH0 },
+ .link_nodes = { &ebi, NULL },
};
static struct qcom_icc_node acm_tcu = {
.name = "acm_tcu",
- .id = SDX55_MASTER_TCU_0,
.channels = 1,
.buswidth = 8,
- .num_links = 3,
- .links = { SDX55_SLAVE_LLCC,
- SDX55_SLAVE_MEM_NOC_SNOC,
- SDX55_SLAVE_MEM_NOC_PCIE_SNOC
- },
+ .link_nodes = { &qns_llcc,
+ &qns_memnoc_snoc,
+ &qns_sys_pcie, NULL },
};
static struct qcom_icc_node qnm_snoc_gc = {
.name = "qnm_snoc_gc",
- .id = SDX55_MASTER_SNOC_GC_MEM_NOC,
.channels = 1,
.buswidth = 8,
- .num_links = 1,
- .links = { SDX55_SLAVE_LLCC },
+ .link_nodes = { &qns_llcc, NULL },
};
static struct qcom_icc_node xm_apps_rdwr = {
.name = "xm_apps_rdwr",
- .id = SDX55_MASTER_AMPSS_M0,
.channels = 1,
.buswidth = 16,
- .num_links = 3,
- .links = { SDX55_SLAVE_LLCC,
- SDX55_SLAVE_MEM_NOC_SNOC,
- SDX55_SLAVE_MEM_NOC_PCIE_SNOC
- },
+ .link_nodes = { &qns_llcc,
+ &qns_memnoc_snoc,
+ &qns_sys_pcie, NULL },
};
static struct qcom_icc_node qhm_audio = {
.name = "qhm_audio",
- .id = SDX55_MASTER_AUDIO,
.channels = 1,
.buswidth = 4,
- .num_links = 1,
- .links = { SDX55_SLAVE_ANOC_SNOC },
+ .link_nodes = { &qns_aggre_noc, NULL },
};
static struct qcom_icc_node qhm_blsp1 = {
.name = "qhm_blsp1",
- .id = SDX55_MASTER_BLSP_1,
.channels = 1,
.buswidth = 4,
- .num_links = 1,
- .links = { SDX55_SLAVE_ANOC_SNOC },
+ .link_nodes = { &qns_aggre_noc, NULL },
};
static struct qcom_icc_node qhm_qdss_bam = {
.name = "qhm_qdss_bam",
- .id = SDX55_MASTER_QDSS_BAM,
- .channels = 1,
- .buswidth = 4,
- .num_links = 28,
- .links = { SDX55_SLAVE_SNOC_CFG,
- SDX55_SLAVE_EMAC_CFG,
- SDX55_SLAVE_USB3,
- SDX55_SLAVE_TLMM,
- SDX55_SLAVE_SPMI_FETCHER,
- SDX55_SLAVE_QDSS_CFG,
- SDX55_SLAVE_PDM,
- SDX55_SLAVE_SNOC_MEM_NOC_GC,
- SDX55_SLAVE_TCSR,
- SDX55_SLAVE_CNOC_DDRSS,
- SDX55_SLAVE_SPMI_VGI_COEX,
- SDX55_SLAVE_QPIC,
- SDX55_SLAVE_OCIMEM,
- SDX55_SLAVE_IPA_CFG,
- SDX55_SLAVE_USB3_PHY_CFG,
- SDX55_SLAVE_AOP,
- SDX55_SLAVE_BLSP_1,
- SDX55_SLAVE_SDCC_1,
- SDX55_SLAVE_CNOC_MSS,
- SDX55_SLAVE_PCIE_PARF,
- SDX55_SLAVE_ECC_CFG,
- SDX55_SLAVE_AUDIO,
- SDX55_SLAVE_AOSS,
- SDX55_SLAVE_PRNG,
- SDX55_SLAVE_CRYPTO_0_CFG,
- SDX55_SLAVE_TCU,
- SDX55_SLAVE_CLK_CTL,
- SDX55_SLAVE_IMEM_CFG
- },
+ .channels = 1,
+ .buswidth = 4,
+ .link_nodes = { &qhs_snoc_cfg,
+ &qhs_emac_cfg,
+ &qhs_usb3,
+ &qhs_tlmm,
+ &qhs_spmi_fetcher,
+ &qhs_qdss_cfg,
+ &qhs_pdm,
+ &qns_snoc_memnoc,
+ &qhs_tcsr,
+ &qhs_ddrss_cfg,
+ &qhs_spmi_vgi_coex,
+ &qhs_qpic,
+ &qxs_imem,
+ &qhs_ipa,
+ &qhs_usb3_phy,
+ &qhs_aop,
+ &qhs_blsp1,
+ &qhs_sdc1,
+ &qhs_mss_cfg,
+ &qhs_pcie_parf,
+ &qhs_ecc_cfg,
+ &qhs_audio,
+ &qhs_aoss,
+ &qhs_prng,
+ &qhs_crypto0_cfg,
+ &xs_sys_tcu_cfg,
+ &qhs_clk_ctl,
+ &qhs_imem_cfg, NULL },
};
static struct qcom_icc_node qhm_qpic = {
.name = "qhm_qpic",
- .id = SDX55_MASTER_QPIC,
.channels = 1,
.buswidth = 4,
- .num_links = 5,
- .links = { SDX55_SLAVE_AOSS,
- SDX55_SLAVE_IPA_CFG,
- SDX55_SLAVE_ANOC_SNOC,
- SDX55_SLAVE_AOP,
- SDX55_SLAVE_AUDIO
- },
+ .link_nodes = { &qhs_aoss,
+ &qhs_ipa,
+ &qns_aggre_noc,
+ &qhs_aop,
+ &qhs_audio, NULL },
};
static struct qcom_icc_node qhm_snoc_cfg = {
.name = "qhm_snoc_cfg",
- .id = SDX55_MASTER_SNOC_CFG,
.channels = 1,
.buswidth = 4,
- .num_links = 1,
- .links = { SDX55_SLAVE_SERVICE_SNOC },
+ .link_nodes = { &srvc_snoc, NULL },
};
static struct qcom_icc_node qhm_spmi_fetcher1 = {
.name = "qhm_spmi_fetcher1",
- .id = SDX55_MASTER_SPMI_FETCHER,
.channels = 1,
.buswidth = 4,
- .num_links = 3,
- .links = { SDX55_SLAVE_AOSS,
- SDX55_SLAVE_ANOC_SNOC,
- SDX55_SLAVE_AOP
- },
+ .link_nodes = { &qhs_aoss,
+ &qns_aggre_noc,
+ &qhs_aop, NULL },
};
static struct qcom_icc_node qnm_aggre_noc = {
.name = "qnm_aggre_noc",
- .id = SDX55_MASTER_ANOC_SNOC,
.channels = 1,
.buswidth = 8,
- .num_links = 30,
- .links = { SDX55_SLAVE_PCIE_0,
- SDX55_SLAVE_SNOC_CFG,
- SDX55_SLAVE_SDCC_1,
- SDX55_SLAVE_TLMM,
- SDX55_SLAVE_SPMI_FETCHER,
- SDX55_SLAVE_QDSS_CFG,
- SDX55_SLAVE_PDM,
- SDX55_SLAVE_SNOC_MEM_NOC_GC,
- SDX55_SLAVE_TCSR,
- SDX55_SLAVE_CNOC_DDRSS,
- SDX55_SLAVE_SPMI_VGI_COEX,
- SDX55_SLAVE_QDSS_STM,
- SDX55_SLAVE_QPIC,
- SDX55_SLAVE_OCIMEM,
- SDX55_SLAVE_IPA_CFG,
- SDX55_SLAVE_USB3_PHY_CFG,
- SDX55_SLAVE_AOP,
- SDX55_SLAVE_BLSP_1,
- SDX55_SLAVE_USB3,
- SDX55_SLAVE_CNOC_MSS,
- SDX55_SLAVE_PCIE_PARF,
- SDX55_SLAVE_ECC_CFG,
- SDX55_SLAVE_APPSS,
- SDX55_SLAVE_AUDIO,
- SDX55_SLAVE_AOSS,
- SDX55_SLAVE_PRNG,
- SDX55_SLAVE_CRYPTO_0_CFG,
- SDX55_SLAVE_TCU,
- SDX55_SLAVE_CLK_CTL,
- SDX55_SLAVE_IMEM_CFG
- },
+ .link_nodes = { &xs_pcie,
+ &qhs_snoc_cfg,
+ &qhs_sdc1,
+ &qhs_tlmm,
+ &qhs_spmi_fetcher,
+ &qhs_qdss_cfg,
+ &qhs_pdm,
+ &qns_snoc_memnoc,
+ &qhs_tcsr,
+ &qhs_ddrss_cfg,
+ &qhs_spmi_vgi_coex,
+ &xs_qdss_stm,
+ &qhs_qpic,
+ &qxs_imem,
+ &qhs_ipa,
+ &qhs_usb3_phy,
+ &qhs_aop,
+ &qhs_blsp1,
+ &qhs_usb3,
+ &qhs_mss_cfg,
+ &qhs_pcie_parf,
+ &qhs_ecc_cfg,
+ &qhs_apss,
+ &qhs_audio,
+ &qhs_aoss,
+ &qhs_prng,
+ &qhs_crypto0_cfg,
+ &xs_sys_tcu_cfg,
+ &qhs_clk_ctl,
+ &qhs_imem_cfg, NULL },
};
static struct qcom_icc_node qnm_ipa = {
.name = "qnm_ipa",
- .id = SDX55_MASTER_IPA,
.channels = 1,
.buswidth = 8,
- .num_links = 27,
- .links = { SDX55_SLAVE_SNOC_CFG,
- SDX55_SLAVE_EMAC_CFG,
- SDX55_SLAVE_USB3,
- SDX55_SLAVE_AOSS,
- SDX55_SLAVE_SPMI_FETCHER,
- SDX55_SLAVE_QDSS_CFG,
- SDX55_SLAVE_PDM,
- SDX55_SLAVE_SNOC_MEM_NOC_GC,
- SDX55_SLAVE_TCSR,
- SDX55_SLAVE_CNOC_DDRSS,
- SDX55_SLAVE_QDSS_STM,
- SDX55_SLAVE_QPIC,
- SDX55_SLAVE_OCIMEM,
- SDX55_SLAVE_IPA_CFG,
- SDX55_SLAVE_USB3_PHY_CFG,
- SDX55_SLAVE_AOP,
- SDX55_SLAVE_BLSP_1,
- SDX55_SLAVE_SDCC_1,
- SDX55_SLAVE_CNOC_MSS,
- SDX55_SLAVE_PCIE_PARF,
- SDX55_SLAVE_ECC_CFG,
- SDX55_SLAVE_AUDIO,
- SDX55_SLAVE_TLMM,
- SDX55_SLAVE_PRNG,
- SDX55_SLAVE_CRYPTO_0_CFG,
- SDX55_SLAVE_CLK_CTL,
- SDX55_SLAVE_IMEM_CFG
- },
+ .link_nodes = { &qhs_snoc_cfg,
+ &qhs_emac_cfg,
+ &qhs_usb3,
+ &qhs_aoss,
+ &qhs_spmi_fetcher,
+ &qhs_qdss_cfg,
+ &qhs_pdm,
+ &qns_snoc_memnoc,
+ &qhs_tcsr,
+ &qhs_ddrss_cfg,
+ &xs_qdss_stm,
+ &qhs_qpic,
+ &qxs_imem,
+ &qhs_ipa,
+ &qhs_usb3_phy,
+ &qhs_aop,
+ &qhs_blsp1,
+ &qhs_sdc1,
+ &qhs_mss_cfg,
+ &qhs_pcie_parf,
+ &qhs_ecc_cfg,
+ &qhs_audio,
+ &qhs_tlmm,
+ &qhs_prng,
+ &qhs_crypto0_cfg,
+ &qhs_clk_ctl,
+ &qhs_imem_cfg, NULL },
};
static struct qcom_icc_node qnm_memnoc = {
.name = "qnm_memnoc",
- .id = SDX55_MASTER_MEM_NOC_SNOC,
.channels = 1,
.buswidth = 8,
- .num_links = 29,
- .links = { SDX55_SLAVE_SNOC_CFG,
- SDX55_SLAVE_EMAC_CFG,
- SDX55_SLAVE_USB3,
- SDX55_SLAVE_TLMM,
- SDX55_SLAVE_SPMI_FETCHER,
- SDX55_SLAVE_QDSS_CFG,
- SDX55_SLAVE_PDM,
- SDX55_SLAVE_TCSR,
- SDX55_SLAVE_CNOC_DDRSS,
- SDX55_SLAVE_SPMI_VGI_COEX,
- SDX55_SLAVE_QDSS_STM,
- SDX55_SLAVE_QPIC,
- SDX55_SLAVE_OCIMEM,
- SDX55_SLAVE_IPA_CFG,
- SDX55_SLAVE_USB3_PHY_CFG,
- SDX55_SLAVE_AOP,
- SDX55_SLAVE_BLSP_1,
- SDX55_SLAVE_SDCC_1,
- SDX55_SLAVE_CNOC_MSS,
- SDX55_SLAVE_PCIE_PARF,
- SDX55_SLAVE_ECC_CFG,
- SDX55_SLAVE_APPSS,
- SDX55_SLAVE_AUDIO,
- SDX55_SLAVE_AOSS,
- SDX55_SLAVE_PRNG,
- SDX55_SLAVE_CRYPTO_0_CFG,
- SDX55_SLAVE_TCU,
- SDX55_SLAVE_CLK_CTL,
- SDX55_SLAVE_IMEM_CFG
- },
+ .link_nodes = { &qhs_snoc_cfg,
+ &qhs_emac_cfg,
+ &qhs_usb3,
+ &qhs_tlmm,
+ &qhs_spmi_fetcher,
+ &qhs_qdss_cfg,
+ &qhs_pdm,
+ &qhs_tcsr,
+ &qhs_ddrss_cfg,
+ &qhs_spmi_vgi_coex,
+ &xs_qdss_stm,
+ &qhs_qpic,
+ &qxs_imem,
+ &qhs_ipa,
+ &qhs_usb3_phy,
+ &qhs_aop,
+ &qhs_blsp1,
+ &qhs_sdc1,
+ &qhs_mss_cfg,
+ &qhs_pcie_parf,
+ &qhs_ecc_cfg,
+ &qhs_apss,
+ &qhs_audio,
+ &qhs_aoss,
+ &qhs_prng,
+ &qhs_crypto0_cfg,
+ &xs_sys_tcu_cfg,
+ &qhs_clk_ctl,
+ &qhs_imem_cfg, NULL },
};
static struct qcom_icc_node qnm_memnoc_pcie = {
.name = "qnm_memnoc_pcie",
- .id = SDX55_MASTER_MEM_NOC_PCIE_SNOC,
.channels = 1,
.buswidth = 8,
- .num_links = 1,
- .links = { SDX55_SLAVE_PCIE_0 },
+ .link_nodes = { &xs_pcie, NULL },
};
static struct qcom_icc_node qxm_crypto = {
.name = "qxm_crypto",
- .id = SDX55_MASTER_CRYPTO_CORE_0,
.channels = 1,
.buswidth = 8,
- .num_links = 3,
- .links = { SDX55_SLAVE_AOSS,
- SDX55_SLAVE_ANOC_SNOC,
- SDX55_SLAVE_AOP
- },
+ .link_nodes = { &qhs_aoss,
+ &qns_aggre_noc,
+ &qhs_aop, NULL },
};
static struct qcom_icc_node xm_emac = {
.name = "xm_emac",
- .id = SDX55_MASTER_EMAC,
.channels = 1,
.buswidth = 8,
- .num_links = 1,
- .links = { SDX55_SLAVE_ANOC_SNOC },
+ .link_nodes = { &qns_aggre_noc, NULL },
};
static struct qcom_icc_node xm_ipa2pcie_slv = {
.name = "xm_ipa2pcie_slv",
- .id = SDX55_MASTER_IPA_PCIE,
.channels = 1,
.buswidth = 8,
- .num_links = 1,
- .links = { SDX55_SLAVE_PCIE_0 },
+ .link_nodes = { &xs_pcie, NULL },
};
static struct qcom_icc_node xm_pcie = {
.name = "xm_pcie",
- .id = SDX55_MASTER_PCIE,
.channels = 1,
.buswidth = 8,
- .num_links = 1,
- .links = { SDX55_SLAVE_ANOC_SNOC },
+ .link_nodes = { &qns_aggre_noc, NULL },
};
static struct qcom_icc_node xm_qdss_etr = {
.name = "xm_qdss_etr",
- .id = SDX55_MASTER_QDSS_ETR,
.channels = 1,
.buswidth = 8,
- .num_links = 28,
- .links = { SDX55_SLAVE_SNOC_CFG,
- SDX55_SLAVE_EMAC_CFG,
- SDX55_SLAVE_USB3,
- SDX55_SLAVE_AOSS,
- SDX55_SLAVE_SPMI_FETCHER,
- SDX55_SLAVE_QDSS_CFG,
- SDX55_SLAVE_PDM,
- SDX55_SLAVE_SNOC_MEM_NOC_GC,
- SDX55_SLAVE_TCSR,
- SDX55_SLAVE_CNOC_DDRSS,
- SDX55_SLAVE_SPMI_VGI_COEX,
- SDX55_SLAVE_QPIC,
- SDX55_SLAVE_OCIMEM,
- SDX55_SLAVE_IPA_CFG,
- SDX55_SLAVE_USB3_PHY_CFG,
- SDX55_SLAVE_AOP,
- SDX55_SLAVE_BLSP_1,
- SDX55_SLAVE_SDCC_1,
- SDX55_SLAVE_CNOC_MSS,
- SDX55_SLAVE_PCIE_PARF,
- SDX55_SLAVE_ECC_CFG,
- SDX55_SLAVE_AUDIO,
- SDX55_SLAVE_AOSS,
- SDX55_SLAVE_PRNG,
- SDX55_SLAVE_CRYPTO_0_CFG,
- SDX55_SLAVE_TCU,
- SDX55_SLAVE_CLK_CTL,
- SDX55_SLAVE_IMEM_CFG
- },
+ .link_nodes = { &qhs_snoc_cfg,
+ &qhs_emac_cfg,
+ &qhs_usb3,
+ &qhs_aoss,
+ &qhs_spmi_fetcher,
+ &qhs_qdss_cfg,
+ &qhs_pdm,
+ &qns_snoc_memnoc,
+ &qhs_tcsr,
+ &qhs_ddrss_cfg,
+ &qhs_spmi_vgi_coex,
+ &qhs_qpic,
+ &qxs_imem,
+ &qhs_ipa,
+ &qhs_usb3_phy,
+ &qhs_aop,
+ &qhs_blsp1,
+ &qhs_sdc1,
+ &qhs_mss_cfg,
+ &qhs_pcie_parf,
+ &qhs_ecc_cfg,
+ &qhs_audio,
+ &qhs_aoss,
+ &qhs_prng,
+ &qhs_crypto0_cfg,
+ &xs_sys_tcu_cfg,
+ &qhs_clk_ctl,
+ &qhs_imem_cfg, NULL },
};
static struct qcom_icc_node xm_sdc1 = {
.name = "xm_sdc1",
- .id = SDX55_MASTER_SDCC_1,
.channels = 1,
.buswidth = 8,
- .num_links = 5,
- .links = { SDX55_SLAVE_AOSS,
- SDX55_SLAVE_IPA_CFG,
- SDX55_SLAVE_ANOC_SNOC,
- SDX55_SLAVE_AOP,
- SDX55_SLAVE_AUDIO
- },
+ .link_nodes = { &qhs_aoss,
+ &qhs_ipa,
+ &qns_aggre_noc,
+ &qhs_aop,
+ &qhs_audio, NULL },
};
static struct qcom_icc_node xm_usb3 = {
.name = "xm_usb3",
- .id = SDX55_MASTER_USB3,
.channels = 1,
.buswidth = 8,
- .num_links = 1,
- .links = { SDX55_SLAVE_ANOC_SNOC },
+ .link_nodes = { &qns_aggre_noc, NULL },
};
static struct qcom_icc_node ebi = {
.name = "ebi",
- .id = SDX55_SLAVE_EBI_CH0,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qns_llcc = {
.name = "qns_llcc",
- .id = SDX55_SLAVE_LLCC,
.channels = 1,
.buswidth = 16,
- .num_links = 1,
- .links = { SDX55_SLAVE_EBI_CH0 },
+ .link_nodes = { &ebi, NULL },
};
static struct qcom_icc_node qns_memnoc_snoc = {
.name = "qns_memnoc_snoc",
- .id = SDX55_SLAVE_MEM_NOC_SNOC,
.channels = 1,
.buswidth = 8,
- .num_links = 1,
- .links = { SDX55_MASTER_MEM_NOC_SNOC },
+ .link_nodes = { &qnm_memnoc, NULL },
};
static struct qcom_icc_node qns_sys_pcie = {
.name = "qns_sys_pcie",
- .id = SDX55_SLAVE_MEM_NOC_PCIE_SNOC,
.channels = 1,
.buswidth = 8,
- .num_links = 1,
- .links = { SDX55_MASTER_MEM_NOC_PCIE_SNOC },
+ .link_nodes = { &qnm_memnoc_pcie, NULL },
};
static struct qcom_icc_node qhs_aop = {
.name = "qhs_aop",
- .id = SDX55_SLAVE_AOP,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_aoss = {
.name = "qhs_aoss",
- .id = SDX55_SLAVE_AOSS,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_apss = {
.name = "qhs_apss",
- .id = SDX55_SLAVE_APPSS,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_audio = {
.name = "qhs_audio",
- .id = SDX55_SLAVE_AUDIO,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_blsp1 = {
.name = "qhs_blsp1",
- .id = SDX55_SLAVE_BLSP_1,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_clk_ctl = {
.name = "qhs_clk_ctl",
- .id = SDX55_SLAVE_CLK_CTL,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_crypto0_cfg = {
.name = "qhs_crypto0_cfg",
- .id = SDX55_SLAVE_CRYPTO_0_CFG,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_ddrss_cfg = {
.name = "qhs_ddrss_cfg",
- .id = SDX55_SLAVE_CNOC_DDRSS,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_ecc_cfg = {
.name = "qhs_ecc_cfg",
- .id = SDX55_SLAVE_ECC_CFG,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_emac_cfg = {
.name = "qhs_emac_cfg",
- .id = SDX55_SLAVE_EMAC_CFG,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_imem_cfg = {
.name = "qhs_imem_cfg",
- .id = SDX55_SLAVE_IMEM_CFG,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_ipa = {
.name = "qhs_ipa",
- .id = SDX55_SLAVE_IPA_CFG,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_mss_cfg = {
.name = "qhs_mss_cfg",
- .id = SDX55_SLAVE_CNOC_MSS,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_pcie_parf = {
.name = "qhs_pcie_parf",
- .id = SDX55_SLAVE_PCIE_PARF,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_pdm = {
.name = "qhs_pdm",
- .id = SDX55_SLAVE_PDM,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_prng = {
.name = "qhs_prng",
- .id = SDX55_SLAVE_PRNG,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_qdss_cfg = {
.name = "qhs_qdss_cfg",
- .id = SDX55_SLAVE_QDSS_CFG,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_qpic = {
.name = "qhs_qpic",
- .id = SDX55_SLAVE_QPIC,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_sdc1 = {
.name = "qhs_sdc1",
- .id = SDX55_SLAVE_SDCC_1,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_snoc_cfg = {
.name = "qhs_snoc_cfg",
- .id = SDX55_SLAVE_SNOC_CFG,
.channels = 1,
.buswidth = 4,
- .num_links = 1,
- .links = { SDX55_MASTER_SNOC_CFG },
+ .link_nodes = { &qhm_snoc_cfg, NULL },
};
static struct qcom_icc_node qhs_spmi_fetcher = {
.name = "qhs_spmi_fetcher",
- .id = SDX55_SLAVE_SPMI_FETCHER,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_spmi_vgi_coex = {
.name = "qhs_spmi_vgi_coex",
- .id = SDX55_SLAVE_SPMI_VGI_COEX,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_tcsr = {
.name = "qhs_tcsr",
- .id = SDX55_SLAVE_TCSR,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_tlmm = {
.name = "qhs_tlmm",
- .id = SDX55_SLAVE_TLMM,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_usb3 = {
.name = "qhs_usb3",
- .id = SDX55_SLAVE_USB3,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qhs_usb3_phy = {
.name = "qhs_usb3_phy",
- .id = SDX55_SLAVE_USB3_PHY_CFG,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node qns_aggre_noc = {
.name = "qns_aggre_noc",
- .id = SDX55_SLAVE_ANOC_SNOC,
.channels = 1,
.buswidth = 8,
- .num_links = 1,
- .links = { SDX55_MASTER_ANOC_SNOC },
+ .link_nodes = { &qnm_aggre_noc, NULL },
};
static struct qcom_icc_node qns_snoc_memnoc = {
.name = "qns_snoc_memnoc",
- .id = SDX55_SLAVE_SNOC_MEM_NOC_GC,
.channels = 1,
.buswidth = 8,
- .num_links = 1,
- .links = { SDX55_MASTER_SNOC_GC_MEM_NOC },
+ .link_nodes = { &qnm_snoc_gc, NULL },
};
static struct qcom_icc_node qxs_imem = {
.name = "qxs_imem",
- .id = SDX55_SLAVE_OCIMEM,
.channels = 1,
.buswidth = 8,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node srvc_snoc = {
.name = "srvc_snoc",
- .id = SDX55_SLAVE_SERVICE_SNOC,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node xs_pcie = {
.name = "xs_pcie",
- .id = SDX55_SLAVE_PCIE_0,
.channels = 1,
.buswidth = 8,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node xs_qdss_stm = {
.name = "xs_qdss_stm",
- .id = SDX55_SLAVE_QDSS_STM,
.channels = 1,
.buswidth = 4,
+ .link_nodes = { NULL },
};
static struct qcom_icc_node xs_sys_tcu_cfg = {
.name = "xs_sys_tcu_cfg",
- .id = SDX55_SLAVE_TCU,
.channels = 1,
.buswidth = 8,
+ .link_nodes = { NULL },
};
static struct qcom_icc_bcm bcm_mc0 = {
@@ -773,6 +766,7 @@ static struct qcom_icc_node * const mc_virt_nodes[] = {
};
static const struct qcom_icc_desc sdx55_mc_virt = {
+ .alloc_dyn_id = true,
.nodes = mc_virt_nodes,
.num_nodes = ARRAY_SIZE(mc_virt_nodes),
.bcms = mc_virt_bcms,
@@ -795,6 +789,7 @@ static struct qcom_icc_node * const mem_noc_nodes[] = {
};
static const struct qcom_icc_desc sdx55_mem_noc = {
+ .alloc_dyn_id = true,
.nodes = mem_noc_nodes,
.num_nodes = ARRAY_SIZE(mem_noc_nodes),
.bcms = mem_noc_bcms,
@@ -874,6 +869,7 @@ static struct qcom_icc_node * const system_noc_nodes[] = {
};
static const struct qcom_icc_desc sdx55_system_noc = {
+ .alloc_dyn_id = true,
.nodes = system_noc_nodes,
.num_nodes = ARRAY_SIZE(system_noc_nodes),
.bcms = system_noc_bcms,
diff --git a/drivers/interconnect/qcom/sdx55.h b/drivers/interconnect/qcom/sdx55.h
deleted file mode 100644
index 46cbabec8aa1f95be840e50618efd04bcbf89f10..0000000000000000000000000000000000000000
--- a/drivers/interconnect/qcom/sdx55.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * Copyright (c) 2021, Linaro Ltd.
- */
-
-#ifndef __DRIVERS_INTERCONNECT_QCOM_SDX55_H
-#define __DRIVERS_INTERCONNECT_QCOM_SDX55_H
-
-/* 0 was used by MASTER_IPA_CORE, now represented as RPMh clock */
-#define SDX55_MASTER_LLCC 1
-#define SDX55_MASTER_TCU_0 2
-#define SDX55_MASTER_SNOC_GC_MEM_NOC 3
-#define SDX55_MASTER_AMPSS_M0 4
-#define SDX55_MASTER_AUDIO 5
-#define SDX55_MASTER_BLSP_1 6
-#define SDX55_MASTER_QDSS_BAM 7
-#define SDX55_MASTER_QPIC 8
-#define SDX55_MASTER_SNOC_CFG 9
-#define SDX55_MASTER_SPMI_FETCHER 10
-#define SDX55_MASTER_ANOC_SNOC 11
-#define SDX55_MASTER_IPA 12
-#define SDX55_MASTER_MEM_NOC_SNOC 13
-#define SDX55_MASTER_MEM_NOC_PCIE_SNOC 14
-#define SDX55_MASTER_CRYPTO_CORE_0 15
-#define SDX55_MASTER_EMAC 16
-#define SDX55_MASTER_IPA_PCIE 17
-#define SDX55_MASTER_PCIE 18
-#define SDX55_MASTER_QDSS_ETR 19
-#define SDX55_MASTER_SDCC_1 20
-#define SDX55_MASTER_USB3 21
-/* 22 was used by SLAVE_IPA_CORE, now represented as RPMh clock */
-#define SDX55_SLAVE_EBI_CH0 23
-#define SDX55_SLAVE_LLCC 24
-#define SDX55_SLAVE_MEM_NOC_SNOC 25
-#define SDX55_SLAVE_MEM_NOC_PCIE_SNOC 26
-#define SDX55_SLAVE_ANOC_SNOC 27
-#define SDX55_SLAVE_SNOC_CFG 28
-#define SDX55_SLAVE_EMAC_CFG 29
-#define SDX55_SLAVE_USB3 30
-#define SDX55_SLAVE_TLMM 31
-#define SDX55_SLAVE_SPMI_FETCHER 32
-#define SDX55_SLAVE_QDSS_CFG 33
-#define SDX55_SLAVE_PDM 34
-#define SDX55_SLAVE_SNOC_MEM_NOC_GC 35
-#define SDX55_SLAVE_TCSR 36
-#define SDX55_SLAVE_CNOC_DDRSS 37
-#define SDX55_SLAVE_SPMI_VGI_COEX 38
-#define SDX55_SLAVE_QPIC 39
-#define SDX55_SLAVE_OCIMEM 40
-#define SDX55_SLAVE_IPA_CFG 41
-#define SDX55_SLAVE_USB3_PHY_CFG 42
-#define SDX55_SLAVE_AOP 43
-#define SDX55_SLAVE_BLSP_1 44
-#define SDX55_SLAVE_SDCC_1 45
-#define SDX55_SLAVE_CNOC_MSS 46
-#define SDX55_SLAVE_PCIE_PARF 47
-#define SDX55_SLAVE_ECC_CFG 48
-#define SDX55_SLAVE_AUDIO 49
-#define SDX55_SLAVE_AOSS 51
-#define SDX55_SLAVE_PRNG 52
-#define SDX55_SLAVE_CRYPTO_0_CFG 53
-#define SDX55_SLAVE_TCU 54
-#define SDX55_SLAVE_CLK_CTL 55
-#define SDX55_SLAVE_IMEM_CFG 56
-#define SDX55_SLAVE_SERVICE_SNOC 57
-#define SDX55_SLAVE_PCIE_0 58
-#define SDX55_SLAVE_QDSS_STM 59
-#define SDX55_SLAVE_APPSS 60
-
-#endif
--
2.39.5
