On Tue, Aug 19, 2025 at 8:56 AM Yao Zi <ziyao@xxxxxxxxxxx> wrote: > > On Mon, Aug 18, 2025 at 08:06:00PM +0530, Anup Patel wrote: > > In RISC-V, there is no CSR read/write instruction which takes CSR > > number via register so add common csr_read_num() and csr_write_num() > > functions which allow accessing certain CSRs by passing CSR number > > as parameter. These common functions will be first used by the > > ACPI CPPC driver and RISC-V PMU driver. > > > > Signed-off-by: Anup Patel <apatel@xxxxxxxxxxxxxxxx> > > Reviewed-by: Sunil V L <sunilvl@xxxxxxxxxxxxxxxx> > > --- > > arch/riscv/include/asm/csr.h | 3 + > > arch/riscv/kernel/Makefile | 1 + > > arch/riscv/kernel/csr.c | 165 +++++++++++++++++++++++++++++++++++ > > drivers/acpi/riscv/cppc.c | 17 ++-- > > drivers/perf/riscv_pmu.c | 54 ++---------- > > 5 files changed, 184 insertions(+), 56 deletions(-) > > create mode 100644 arch/riscv/kernel/csr.c > > > > diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h > > index 6fed42e37705..1540626b3540 100644 > > --- a/arch/riscv/include/asm/csr.h > > +++ b/arch/riscv/include/asm/csr.h > > @@ -575,6 +575,9 @@ > > : "memory"); \ > > }) > > > > +extern unsigned long csr_read_num(unsigned long csr_num, int *out_err); > > +extern void csr_write_num(unsigned long csr_num, unsigned long val, int *out_err); > > I think it's more consistent to directly return the error code, and for > csr_read_num, we could pass out the read value by a pointer. e.g. > > int csr_read_num(unsigned long csr_num, unsigned long *val); > int csr_write_num(unsigned long csr_num, unsigned long val); > > This allows the caller to eliminate a variable for temporarily storing > the error code if they use it just after the invokation, and fits the > common convention of Linux better. Drew had similar comments so see my response in the previous patch revision. (Refer, https://www.spinics.net/lists/kernel/msg5808113.html) Regards, Anup
