On Mon, Aug 18, 2025 at 08:06:00PM +0530, Anup Patel wrote: > In RISC-V, there is no CSR read/write instruction which takes CSR > number via register so add common csr_read_num() and csr_write_num() > functions which allow accessing certain CSRs by passing CSR number > as parameter. These common functions will be first used by the > ACPI CPPC driver and RISC-V PMU driver. > > Signed-off-by: Anup Patel <apatel@xxxxxxxxxxxxxxxx> > Reviewed-by: Sunil V L <sunilvl@xxxxxxxxxxxxxxxx> > --- > arch/riscv/include/asm/csr.h | 3 + > arch/riscv/kernel/Makefile | 1 + > arch/riscv/kernel/csr.c | 165 +++++++++++++++++++++++++++++++++++ > drivers/acpi/riscv/cppc.c | 17 ++-- > drivers/perf/riscv_pmu.c | 54 ++---------- > 5 files changed, 184 insertions(+), 56 deletions(-) > create mode 100644 arch/riscv/kernel/csr.c > Reviewed-by: Andrew Jones <ajones@xxxxxxxxxxxxxxxx>
