Hello James,
> From: Shanker Donthineni <sdonthineni@xxxxxxxxxx>
>
> The device-tree binding has two examples for MSC associated with memory
> controllers. Add the support to discover the component_id from the device-tree
> and create 'memory' RIS.
>
> Signed-off-by: Shanker Donthineni <sdonthineni@xxxxxxxxxx> [ morse: split
> out of a bigger patch, added affinity piece ]
> Signed-off-by: James Morse <james.morse@xxxxxxx>
> ---
> drivers/resctrl/mpam_devices.c | 67
> ++++++++++++++++++++++++----------
> 1 file changed, 47 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c
> index a0d9a699a6e7..71a1fb1a9c75 100644
> --- a/drivers/resctrl/mpam_devices.c
> +++ b/drivers/resctrl/mpam_devices.c
> @@ -62,41 +62,63 @@ static int mpam_dt_parse_resource(struct mpam_msc
> *msc, struct device_node *np,
> u32 ris_idx)
> {
> int err = 0;
> - u32 level = 0;
> - unsigned long cache_id;
> - struct device_node *cache;
> + u32 class_id = 0, component_id = 0;
> + struct device_node *cache = NULL, *memory = NULL;
> + enum mpam_class_types type = MPAM_CLASS_UNKNOWN;
>
> do {
> + /* What kind of MSC is this? */
> if (of_device_is_compatible(np, "arm,mpam-cache")) {
> cache = of_parse_phandle(np, "arm,mpam-device",
> 0);
> if (!cache) {
> pr_err("Failed to read phandle\n");
> break;
> }
> + type = MPAM_CLASS_CACHE;
> } else if (of_device_is_compatible(np->parent, "cache")) {
> cache = of_node_get(np->parent);
> + type = MPAM_CLASS_CACHE;
> + } else if (of_device_is_compatible(np, "arm,mpam-memory"))
> {
> + memory = of_parse_phandle(np, "arm,mpam-device",
> 0);
> + if (!memory) {
> + pr_err("Failed to read phandle\n");
> + break;
> + }
> + type = MPAM_CLASS_MEMORY;
> + } else if (of_device_is_compatible(np,
> "arm,mpam-memory-controller-msc")) {
> + memory = of_node_get(np->parent);
> + type = MPAM_CLASS_MEMORY;
> } else {
> - /* For now, only caches are supported */
> - cache = NULL;
> + /*
> + * For now, only caches and memory controllers are
> + * supported.
> + */
> break;
> }
There is no need "{}" here.
Best regards,
Shaopeng TAN
> - err = of_property_read_u32(cache, "cache-level", &level);
> - if (err) {
> - pr_err("Failed to read cache-level\n");
> - break;
> - }
> -
> - cache_id = cache_of_calculate_id(cache);
> - if (cache_id == ~0UL) {
> - err = -ENOENT;
> - break;
> + /* Determine the class and component ids, based on type. */
> + if (type == MPAM_CLASS_CACHE) {
> + err = of_property_read_u32(cache, "cache-level",
> &class_id);
> + if (err) {
> + pr_err("Failed to read cache-level\n");
> + break;
> + }
> + component_id = cache_of_calculate_id(cache);
> + if (component_id == ~0UL) {
> + err = -ENOENT;
> + break;
> + }
> + } else if (type == MPAM_CLASS_MEMORY) {
> + err = of_node_to_nid(np);
> + component_id = (err == NUMA_NO_NODE) ? 0 : err;
> + class_id = 255;
> }
>
> - err = mpam_ris_create(msc, ris_idx, MPAM_CLASS_CACHE,
> level,
> - cache_id);
> + err = mpam_ris_create(msc, ris_idx, type, class_id,
> + component_id);
> } while (0);
> of_node_put(cache);
> + of_node_put(memory);
>
> return err;
> }
> @@ -157,9 +179,14 @@ static int update_msc_accessibility(struct mpam_msc
> *msc)
> cpumask_copy(&msc->accessibility, cpu_possible_mask);
> err = 0;
> } else {
> - err = -EINVAL;
> - pr_err("Cannot determine accessibility of MSC: %s\n",
> - dev_name(&msc->pdev->dev));
> + if (of_device_is_compatible(parent, "memory")) {
> + cpumask_copy(&msc->accessibility,
> cpu_possible_mask);
> + err = 0;
> + } else {
> + err = -EINVAL;
> + pr_err("Cannot determine accessibility of
> MSC: %s\n",
> + dev_name(&msc->pdev->dev));
> + }
> }
> of_node_put(parent);
>
> --
> 2.20.1
