On Wed, Sep 10, 2025 at 5:42 PM <cp0613@xxxxxxxxxxxxxxxxx> wrote:
>
> From: Chen Pei <cp0613@xxxxxxxxxxxxxxxxx>
>
> The commit 4aca2bef90bd1296 ("ACPICA: Headers: Add RISC-V SBI Subtype
> to DBG2") has added the definition of ACPI_DBG2_RISCV_SBI_CON.
>
> This patch continues to implement its function so that the parameters
> of uart can be configured correctly. Subsequent calls to setup_earlycon
> to reuse the earlycon based on sbi.
>
> Signed-off-by: Chen Pei <cp0613@xxxxxxxxxxxxxxxxx>
> ---
> drivers/acpi/spcr.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/acpi/spcr.c b/drivers/acpi/spcr.c
> index cd36a97b0ea2..208d6bbc65e0 100644
> --- a/drivers/acpi/spcr.c
> +++ b/drivers/acpi/spcr.c
> @@ -141,6 +141,9 @@ int __init acpi_parse_spcr(bool enable_earlycon, bool enable_console)
> case ACPI_DBG2_16550_NVIDIA:
> uart = "uart";
> break;
> + case ACPI_DBG2_RISCV_SBI_CON:
> + uart = "sbi";
> + break;
Yes, SPCR lacks ACPI_DBG2_RISCV_SBI_CON, and ACPICA has adopted it.
So, it's time to add ACPI_DBG2_RISCV_SBI_CON support in spcr.c. It
would solve the UEFI + ACPI early debug problem.
LGTM!
Reviewed-by: Guo Ren (Alibaba Damo Academy) <guoren@xxxxxxxxxx>
> default:
> err = -ENOENT;
> goto done;
> --
> 2.49.0
>
--
Best Regards
Guo Ren
