On Wed, 10 Sep 2025 20:43:06 +0000 James Morse <james.morse@xxxxxxx> wrote: > From: Rohit Mathew <rohit.mathew@xxxxxxx> > > If the 44 bit (long) or 63 bit (LWD) counters are detected on probing > the RIS, use long/LWD counter instead of the regular 31 bit mbwu > counter. > > Only 32bit accesses to the MSC are required to be supported by the > spec, but these registers are 64bits. The lower half may overflow > into the higher half between two 32bit reads. To avoid this, use > a helper that reads the top half multiple times to check for overflow. > > Signed-off-by: Rohit Mathew <rohit.mathew@xxxxxxx> > [morse: merged multiple patches from Rohit] > Signed-off-by: James Morse <james.morse@xxxxxxx> > Reviewed-by: Ben Horgan <ben.horgan@xxxxxxx> Reviewed-by: Jonathan Cameron <jonathan.cameron@xxxxxxxxxx>
