On Wed, 30 Jul 2025 16:47:08 -0500
Ben Cheatham <Benjamin.Cheatham@xxxxxxx> wrote:
> Enable CXL.mem isolation during set up of CXL-capable PCIe Root Ports
> that have the capability. This capability is optional, so failure to
> enable isolation is not an error that should fail probe.
>
> Signed-off-by: Ben Cheatham <Benjamin.Cheatham@xxxxxxx>
> +static int cxl_dport_wait_for_rp_busy(void __iomem *reg)
> +{
> + u32 status;
> + int i = 4;
> +
> + do {
readl_poll_timeout() in iopoll.h should work here.
> + status = readl(reg + CXL_ISOLATION_STATUS_OFFSET);
> + if (!(status & CXL_ISOLATION_STAT_RP_BUSY))
> + return 0;
> +
> + msleep(500);
> + } while (--i);
> +
> + return -ETIMEDOUT;
> +}
