On Wed, Jun 04, 2025 at 11:18:15AM +0200, Rafael J. Wysocki wrote: > On Wed, Jun 4, 2025 at 2:18 AM Ricardo Neri > <ricardo.neri-calderon@xxxxxxxxxxxxxxx> wrote: > > > > Add DeviceTree bindings to enumerate the wakeup mailbox used in platform > > firmware for Intel processors. > > > > x86 platforms commonly boot secondary CPUs using an INIT assert, de-assert > > followed by Start-Up IPI messages. The wakeup mailbox can be used when this > > mechanism is unavailable. > > > > The wakeup mailbox offers more control to the operating system to boot > > secondary CPUs than a spin-table. It allows the reuse of same wakeup vector > > for all CPUs while maintaining control over which CPUs to boot and when. > > While it is possible to achieve the same level of control using a spin- > > table, it would require to specify a separate `cpu-release-addr` for each > > secondary CPU. > > > > The operation and structure of the mailbox is described in the > > Multiprocessor Wakeup Structure defined in the ACPI specification. Note > > that this structure does not specify how to publish the mailbox to the > > operating system (ACPI-based platform firmware uses a separate table). No > > ACPI table is needed in DeviceTree-based firmware to enumerate the mailbox. > > > > Add a `compatible` property that the operating system can use to discover > > the mailbox. Nodes wanting to refer to the reserved memory usually define a > > `memory-region` property. /cpus/cpu* nodes would want to refer to the > > mailbox, but they do not have such property defined in the DeviceTree > > specification. Moreover, it would imply that there is a memory region per > > CPU. > > > > Co-developed-by: Yunhong Jiang <yunhong.jiang@xxxxxxxxxxxxxxx> > > Signed-off-by: Yunhong Jiang <yunhong.jiang@xxxxxxxxxxxxxxx> > > Signed-off-by: Ricardo Neri <ricardo.neri-calderon@xxxxxxxxxxxxxxx> > > --- > > Changes since v3: > > - Removed redefinitions of the mailbox and instead referred to ACPI > > specification as per discussion on LKML. > > - Clarified that DeviceTree-based firmware do not require the use of > > ACPI tables to enumerate the mailbox. (Rob) > > - Described the need of using a `compatible` property. > > - Dropped the `alignment` property. (Krzysztof, Rafael) > > - Used a real address for the mailbox node. (Krzysztof) > > > > Changes since v2: > > - Implemented the mailbox as a reserved-memory node. Add to it a > > `compatible` property. (Krzysztof) > > - Explained the relationship between the mailbox and the `enable-mehod` > > property of the CPU nodes. > > - Expanded the documentation of the binding. > > > > Changes since v1: > > - Added more details to the description of the binding. > > - Added requirement a new requirement for cpu@N nodes to add an > > `enable-method`. > > --- > > .../reserved-memory/intel,wakeup-mailbox.yaml | 48 ++++++++++++++++++++++ > > 1 file changed, 48 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/reserved-memory/intel,wakeup-mailbox.yaml b/Documentation/devicetree/bindings/reserved-memory/intel,wakeup-mailbox.yaml > > new file mode 100644 > > index 000000000000..f18643805866 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/reserved-memory/intel,wakeup-mailbox.yaml > > @@ -0,0 +1,48 @@ > > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/reserved-memory/intel,wakeup-mailbox.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: Wakeup Mailbox for Intel processors > > + > > +description: | > > + The Wakeup Mailbox provides a mechanism for the operating system to wake up > > + secondary CPUs on Intel processors. It is an alternative to the INIT-!INIT- > > + SIPI sequence used on most x86 systems. > > + > > + The structure and operation of the mailbox is described in the Multiprocessor > > + Wakeup Structure of the ACPI specification. > > Please make this more specific: Which specification version and what section. > > You may as well add a URL here too. Sure Rafael. I will refer to the ACPI specification v6.6 secton 5.2.12.19. It is the latest version at the time of writing this schema.
