On 5/12/2025 1:45 AM, Xin Li (Intel) wrote:
Convert a native_wrmsr() use to native_wrmsrq() to zap meaningless type
conversions when a u64 MSR value is splitted into two u32.
Signed-off-by: Xin Li (Intel) <xin@xxxxxxxxx>
---
arch/x86/coco/sev/core.c | 7 +------
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/arch/x86/coco/sev/core.c b/arch/x86/coco/sev/core.c
index ff82151f7718..b3ce6fc8b62d 100644
--- a/arch/x86/coco/sev/core.c
+++ b/arch/x86/coco/sev/core.c
@@ -282,12 +282,7 @@ static inline u64 sev_es_rd_ghcb_msr(void)
static __always_inline void sev_es_wr_ghcb_msr(u64 val)
{
- u32 low, high;
-
- low = (u32)(val);
- high = (u32)(val >> 32);
-
- native_wrmsr(MSR_AMD64_SEV_ES_GHCB, low, high);
+ native_wrmsrq(MSR_AMD64_SEV_ES_GHCB, val);
}
static int vc_fetch_insn_kernel(struct es_em_ctxt *ctxt,
Just noticed that this patch doesn't apply to tip/x86/core, I will send
it as a separate one.
Thanks!
Xin
