2025-08-14T21:25:42+05:30, Anup Patel <apatel@xxxxxxxxxxxxxxxx>: > This series adds ONE_REG interface for SBI FWFT extension implemented > by KVM RISC-V. I think it would be better to ONE_REG the CSRs (medeleg/menvcfg), or at least expose their CSR fields (each sensible medeleg bit, PMM, ...) through kvm_riscv_config, than to couple this with SBI/FWFT. The controlled behavior is defined by the ISA, and userspace might want to configure the S-mode execution environment even when SBI/FWFT is not present, which is not possible with the current design. Is there a benefit in expressing the ISA model through SBI/FWFT? Thanks.