On Mon, Aug 18, 2025 at 2:17 PM Guo Ren <guoren@xxxxxxxxxx> wrote:
>
> On Mon, Aug 18, 2025 at 1:42 PM <fangyu.yu@xxxxxxxxxxxxxxxxx> wrote:
> >
> > From: Fangyu Yu <fangyu.yu@xxxxxxxxxxxxxxxxx>
> >
> > According to the RISC-V Privileged Architecture Spec, when MODE=Bare
> > is selected,software must write zero to the remaining fields of hgatp.
> >
> > We have detected the valid mode supported by the HW before, So using a
> > valid mode to detect how many vmid bits are supported.
> Good catch! It's a bug. The code seems copied from asids_init(), whose
> old value is not bare mode. For real hardware, it would cause
> problems, but the qemu buggy code hides the problem.
>
> It needs a tag: Fixes: fd7bb4a251df ("RISC-V: KVM: Implement VMID allocator")
>
> Others, Reviewed-by: Guo Ren <guoren@xxxxxxxxxx>
Sorry for the typo:
Reviewed-by: Guo Ren <guoren@xxxxxxxxxx>
^^
>
> >
> > Signed-off-by: Fangyu Yu <fangyu.yu@xxxxxxxxxxxxxxxxx>
> >
> > ---
> > Changes in v2:
> > - Fixed build error since kvm_riscv_gstage_mode() has been modified.
> > ---
> > arch/riscv/kvm/vmid.c | 3 ++-
> > 1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/riscv/kvm/vmid.c b/arch/riscv/kvm/vmid.c
> > index 3b426c800480..5f33625f4070 100644
> > --- a/arch/riscv/kvm/vmid.c
> > +++ b/arch/riscv/kvm/vmid.c
> > @@ -14,6 +14,7 @@
> > #include <linux/smp.h>
> > #include <linux/kvm_host.h>
> > #include <asm/csr.h>
> > +#include <asm/kvm_mmu.h>
> > #include <asm/kvm_tlb.h>
> > #include <asm/kvm_vmid.h>
> >
> > @@ -28,7 +29,7 @@ void __init kvm_riscv_gstage_vmid_detect(void)
> >
> > /* Figure-out number of VMID bits in HW */
> > old = csr_read(CSR_HGATP);
> > - csr_write(CSR_HGATP, old | HGATP_VMID);
> > + csr_write(CSR_HGATP, (kvm_riscv_gstage_mode << HGATP_MODE_SHIFT) | HGATP_VMID);
> > vmid_bits = csr_read(CSR_HGATP);
> > vmid_bits = (vmid_bits & HGATP_VMID) >> HGATP_VMID_SHIFT;
> > vmid_bits = fls_long(vmid_bits);
> > --
> > 2.49.0
> >
>
>
> --
> Best Regards
> Guo Ren
--
Best Regards
Guo Ren
