On 8/26/2025 3:36 PM, Huang, Kai wrote:
> On Mon, 2025-08-25 at 15:20 +0000, Nikunj A Dadhania wrote:
>> Move the PML (Page Modification Logging) buffer flushing logic from
>> VMX-specific code to common x86 KVM code to enable reuse by SVM and avoid
>> code duplication.
>
> Looking at the code change, IIUC the PML code that is moved to x86 common
> assumes AMD's PML also follows VMX's behaviour:
>
> 1) The PML buffer is a 4K page;
> 2) The hardware records the dirty GPA in backwards to the PML buffer
>
> Could we point this out in the changelog?
Ack, will add in the next revision
>
> [...]
>
>> --- a/arch/x86/kvm/vmx/vmx.h
>> +++ b/arch/x86/kvm/vmx/vmx.h
>> @@ -269,11 +269,6 @@ struct vcpu_vmx {
>> unsigned int ple_window;
>> bool ple_window_dirty;
>>
>> - /* Support for PML */
>> -#define PML_LOG_NR_ENTRIES 512
>> - /* PML is written backwards: this is the first entry written by the CPU */
>> -#define PML_HEAD_INDEX (PML_LOG_NR_ENTRIES-1)
>> -
>> struct page *pml_pg;
>
> Can we share the 'pml_pg' as well?
Sure, Is struct kvm_vcpu_arch the right place?
Regards,
Nikunj
