Applied, thanks.
Huacai
On Tue, Aug 26, 2025 at 11:35 AM Bibo Mao <maobibo@xxxxxxxxxxx> wrote:
>
> With 3C6000 hardware platform, hardware page table walking(PTW) features
> is supported on host. Here add this feature detection on KVM host.
>
> Signed-off-by: Bibo Mao <maobibo@xxxxxxxxxxx>
> ---
> arch/loongarch/include/uapi/asm/kvm.h | 1 +
> arch/loongarch/kvm/vcpu.c | 2 ++
> arch/loongarch/kvm/vm.c | 4 ++++
> 3 files changed, 7 insertions(+)
>
> diff --git a/arch/loongarch/include/uapi/asm/kvm.h b/arch/loongarch/include/uapi/asm/kvm.h
> index 5f354f5c6847..57ba1a563bb1 100644
> --- a/arch/loongarch/include/uapi/asm/kvm.h
> +++ b/arch/loongarch/include/uapi/asm/kvm.h
> @@ -103,6 +103,7 @@ struct kvm_fpu {
> #define KVM_LOONGARCH_VM_FEAT_PMU 5
> #define KVM_LOONGARCH_VM_FEAT_PV_IPI 6
> #define KVM_LOONGARCH_VM_FEAT_PV_STEALTIME 7
> +#define KVM_LOONGARCH_VM_FEAT_PTW 8
>
> /* Device Control API on vcpu fd */
> #define KVM_LOONGARCH_VCPU_CPUCFG 0
> diff --git a/arch/loongarch/kvm/vcpu.c b/arch/loongarch/kvm/vcpu.c
> index ce478151466c..9c802f7103c6 100644
> --- a/arch/loongarch/kvm/vcpu.c
> +++ b/arch/loongarch/kvm/vcpu.c
> @@ -680,6 +680,8 @@ static int _kvm_get_cpucfg_mask(int id, u64 *v)
> *v |= CPUCFG2_ARMBT;
> if (cpu_has_lbt_mips)
> *v |= CPUCFG2_MIPSBT;
> + if (cpu_has_ptw)
> + *v |= CPUCFG2_PTW;
>
> return 0;
> case LOONGARCH_CPUCFG3:
> diff --git a/arch/loongarch/kvm/vm.c b/arch/loongarch/kvm/vm.c
> index edccfc8c9cd8..a49b1c1a3dd1 100644
> --- a/arch/loongarch/kvm/vm.c
> +++ b/arch/loongarch/kvm/vm.c
> @@ -146,6 +146,10 @@ static int kvm_vm_feature_has_attr(struct kvm *kvm, struct kvm_device_attr *attr
> if (kvm_pvtime_supported())
> return 0;
> return -ENXIO;
> + case KVM_LOONGARCH_VM_FEAT_PTW:
> + if (cpu_has_ptw)
> + return 0;
> + return -ENXIO;
> default:
> return -ENXIO;
> }
> --
> 2.39.3
>
