Changes:
v2 -> v3:
* Fix the emulated instrunction validation error on SRF/CWF. (Patch 5/8)
v1 -> v2:
* Fix the flaws on x86_model() helper (Xiaoyao).
* Fix the pmu_pebs error on GNR/SRF.
This patchset fixes the pmu test errors on Granite Rapids (GNR), Sierra
Forest (SRF) and Clearwater Forest (CWF).
GNR and SRF start to support the timed PEBS. Timed PEBS adds a new
"retired latency" field in basic info group to show the timing info and
the PERF_CAPABILITIES[17] called "PEBS_TIMING_INFO" bit is added
to indicated whether timed PEBS is supported. KVM module doesn't need to
do any specific change to support timed PEBS except a perf change adding
PERF_CAP_PEBS_TIMING_INFO flag into PERF_CAP_PEBS_MASK[1]. The patch 7/7
supports timed PEBS validation in pmu_pebs test.
On Intel Atom platforms, the PMU events "Instruction Retired" or
"Branch Instruction Retired" may be overcounted for some certain
instructions, like FAR CALL/JMP, RETF, IRET, VMENTRY/VMEXIT/VMPTRLD
and complex SGX/SMX/CSTATE instructions/flows[2].
In details, for the Atom platforms before Sierra Forest (including
Sierra Forest), Both 2 events "Instruction Retired" and
"Branch Instruction Retired" would be overcounted on these certain
instructions, but for Clearwater Forest only "Instruction Retired" event
is overcounted on these instructions.
As the overcount issue, pmu test would fail to validate the precise
count for these 2 events on SRF and CWF. Patches 1-4/7 detects if the
platform has this overcount issue, if so relax the precise count
validation for these 2 events.
Besides it looks more LLC references are needed on SRF/CWF, so adjust
the "LLC references" event count range.
Tests:
* pmu tests passed on SPR/GNR/SRF/CWF.
* pmu_lbr tests is skiped on SPR/GNR/SRF/CWF since mediated vPMU based
arch-LBR support is not upstreamed yet.
* pmu_pebs test passed on SPR/GNR/SRF and skiped on CWF since CWF
introduces architectural PEBS and mediated vPMU based arch-PEBS
support is not upstreamed yet.
History:
* v2: https://lore.kernel.org/all/20250718013915.227452-1-dapeng1.mi@xxxxxxxxxxxxxxx/
* v1: https://lore.kernel.org/all/20250712174915.196103-1-dapeng1.mi@xxxxxxxxxxxxxxx/
Refs:
[1] https://lore.kernel.org/all/20250717090302.11316-1-dapeng1.mi@xxxxxxxxxxxxxxx/
[2] https://edc.intel.com/content/www/us/en/design/products-and-solutions/processors-and-chipsets/sierra-forest/xeon-6700-series-processor-with-e-cores-specification-update/errata-details
Dapeng Mi (3):
x86/pmu: Relax precise count check for emulated instructions tests
x86: pmu_pebs: Remove abundant data_cfg_match calculation
x86: pmu_pebs: Support to validate timed PEBS record on GNR/SRF
dongsheng (5):
x86/pmu: Add helper to detect Intel overcount issues
x86/pmu: Relax precise count validation for Intel overcounted
platforms
x86/pmu: Fix incorrect masking of fixed counters
x86/pmu: Handle instruction overcount issue in overflow test
x86/pmu: Expand "llc references" upper limit for broader compatibility
lib/x86/pmu.h | 6 +++
lib/x86/processor.h | 27 +++++++++++++
x86/pmu.c | 95 ++++++++++++++++++++++++++++++++++++++-------
x86/pmu_pebs.c | 9 +++--
4 files changed, 120 insertions(+), 17 deletions(-)
base-commit: 525bdb5d65d51a367341f471eb1bcd505d73c51f
--
2.34.1
