On Thu, 2025-08-07 at 17:45 +0800, Yan Zhao wrote: > From: "Kirill A. Shutemov" <kirill.shutemov@xxxxxxxxxxxxxxx> > > The TDX module enumerates with a TDX_FEATURES0 bit if an explicit cache > flush is necessary when switching KeyID for a page, like before > handing the page over to a TD. > > Currently, none of the TDX-capable platforms have this bit enabled. > > Moreover, cache flushing with TDH.PHYMEM.PAGE.WBINVD fails if > Dynamic PAMT is active and the target page is not 4k. The SEAMCALL only > supports 4k pages and will fail if there is no PAMT_4K for the HPA. > > Avoid performing these cache flushes unless the CLFLUSH_BEFORE_ALLOC bit > of TDX_FEATURES0 is set. > > Signed-off-by: Kirill A. Shutemov <kirill.shutemov@xxxxxxxxxxxxxxx> > Signed-off-by: Yan Zhao <yan.y.zhao@xxxxxxxxx> I think I mentioned this on some version of this patch already, but during the base series we decided to assume CLFLUSH_BEFORE_ALLOC was always set for simplicity. Let's try to be consistent. Why prepare for some future TDX module that sets CLFLUSH_BEFORE_ALLOC *and* adds new support for at larger page sizes TDH.PHYMEM.PAGE.WBINVD? It almost seems like this is working around a bug.
