On Tue, Aug 05, 2025, Sean Christopherson wrote: > Stating the obvious, this allows handling MSR_IA32_TSC_DEADLINE writes in > the fastpath on AMD CPUs. Got around to measuring this via the KUT vmexit "tscdeadline_immed" test. Without the mediated PMU, the gains are very modest: ~2550 => ~2400 cycles. But with the mediated PMU and its heavy context switch, the gains are ~6100 => ~2400 cycles.
