On 2025/7/17 14:12, Anup Patel wrote:
On Fri, Jun 13, 2025 at 5:08 PM <zhouquan@xxxxxxxxxxx> wrote:From: Quan Zhou <zhouquan@xxxxxxxxxxx> Some common KVM test cases are supported on riscv now as following: access_tracking_perf_test demand_paging_test dirty_log_perf_test dirty_log_test guest_print_test kvm_binary_stats_test kvm_create_max_vcpus kvm_page_table_test memslot_modification_stress_test memslot_perf_test rseq_test set_memory_region_test Add missing headers for tests and fix RISCV_FENCE redefinition in `rseq-riscv.h` by using the existing macro from <asm/fence.h>. Signed-off-by: Quan Zhou <zhouquan@xxxxxxxxxxx>Please address Drew's comments and send v2 of only this patch. The first patch of this series is already queued. Regards, Anup
Okay, I'll split and modify this set of patches. Thanks. Regards, Quan
--- tools/testing/selftests/kvm/Makefile.kvm | 12 ++++++++++++ .../testing/selftests/kvm/include/riscv/processor.h | 2 ++ tools/testing/selftests/rseq/rseq-riscv.h | 3 +-- 3 files changed, 15 insertions(+), 2 deletions(-) diff --git a/tools/testing/selftests/kvm/Makefile.kvm b/tools/testing/selftests/kvm/Makefile.kvm index 38b95998e1e6..565e191e99c8 100644 --- a/tools/testing/selftests/kvm/Makefile.kvm +++ b/tools/testing/selftests/kvm/Makefile.kvm @@ -197,6 +197,18 @@ TEST_GEN_PROGS_riscv += arch_timer TEST_GEN_PROGS_riscv += coalesced_io_test TEST_GEN_PROGS_riscv += get-reg-list TEST_GEN_PROGS_riscv += steal_time +TEST_GEN_PROGS_riscv += access_tracking_perf_test +TEST_GEN_PROGS_riscv += demand_paging_test +TEST_GEN_PROGS_riscv += dirty_log_perf_test +TEST_GEN_PROGS_riscv += dirty_log_test +TEST_GEN_PROGS_riscv += guest_print_test +TEST_GEN_PROGS_riscv += kvm_binary_stats_test +TEST_GEN_PROGS_riscv += kvm_create_max_vcpus +TEST_GEN_PROGS_riscv += kvm_page_table_test +TEST_GEN_PROGS_riscv += memslot_modification_stress_test +TEST_GEN_PROGS_riscv += memslot_perf_test +TEST_GEN_PROGS_riscv += rseq_test +TEST_GEN_PROGS_riscv += set_memory_region_test TEST_GEN_PROGS_loongarch += coalesced_io_test TEST_GEN_PROGS_loongarch += demand_paging_test diff --git a/tools/testing/selftests/kvm/include/riscv/processor.h b/tools/testing/selftests/kvm/include/riscv/processor.h index 162f303d9daa..4cf5ae11760f 100644 --- a/tools/testing/selftests/kvm/include/riscv/processor.h +++ b/tools/testing/selftests/kvm/include/riscv/processor.h @@ -9,7 +9,9 @@ #include <linux/stringify.h> #include <asm/csr.h> +#include <asm/vdso/processor.h> #include "kvm_util.h" +#include "ucall_common.h" #define INSN_OPCODE_MASK 0x007c #define INSN_OPCODE_SHIFT 2 diff --git a/tools/testing/selftests/rseq/rseq-riscv.h b/tools/testing/selftests/rseq/rseq-riscv.h index 67d544aaa9a3..06c840e81c8b 100644 --- a/tools/testing/selftests/rseq/rseq-riscv.h +++ b/tools/testing/selftests/rseq/rseq-riscv.h @@ -8,6 +8,7 @@ * exception when executed in all modes. */ #include <endian.h> +#include <asm/fence.h> #if defined(__BYTE_ORDER) ? (__BYTE_ORDER == __LITTLE_ENDIAN) : defined(__LITTLE_ENDIAN) #define RSEQ_SIG 0xf1401073 /* csrr mhartid, x0 */ @@ -24,8 +25,6 @@ #define REG_L __REG_SEL("ld ", "lw ") #define REG_S __REG_SEL("sd ", "sw ") -#define RISCV_FENCE(p, s) \ - __asm__ __volatile__ ("fence " #p "," #s : : : "memory") #define rseq_smp_mb() RISCV_FENCE(rw, rw) #define rseq_smp_rmb() RISCV_FENCE(r, r) #define rseq_smp_wmb() RISCV_FENCE(w, w) -- 2.34.1
