[Sorry for bumping an old thread] On Wed, Jun 04, 2025 at 06:54:44PM +0200, Paolo Bonzini wrote: > On 5/30/25 01:08, Sean Christopherson wrote: > > On Thu, May 29, 2025, Kai Huang wrote: > > > On Thu, 2025-05-29 at 07:31 -0700, Sean Christopherson wrote: > > > > On Thu, May 29, 2025, Kai Huang wrote: > > > > > On Thu, 2025-05-29 at 23:55 +1200, Kai Huang wrote: > > > > > > Do they only support userspace IRQ chip, or not support any IRQ chip at all? > > > > > > > > The former, only userspace I/O APIC (and associated devices), though some VM > > > > shapes, e.g. TDX, don't provide an I/O APIC or PIC. > > > > > > Thanks for the info. > > > > > > Just wondering what's the benefit of using userspace IRQCHIP instead of > > > emulating in the kernel? > > > > Reduced kernel attack surface (this was especially true years ago, before KVM's > > I/O APIC emulation was well-tested) and more flexibility (e.g. shipping userspace > > changes is typically easier than shipping new kernels. I'm pretty sure there's > > one more big one that I'm blanking on at the moment. > > Feature-wise, the big one is support for IRQ remapping which is not > implemented in the in-kernel IOAPIC. Is there a reason to prefer the in-kernel IOAPIC today, seeing as it is still the default with Qemu? Thanks, Naveen
