Copy KVM selftests' X86_PROPERTY_* infrastructure (multi-bit CPUID fields), and use the properties to clean up various warts. The SEV code is particular makes things much harder than they need to be. Note, this applies on kvm-x86 next. v2: - Avoid tabs immediatedly after #defines. [Dapeng] - Sqaush the arch events vs. GP counters fixes into one patch. [Dapeng] - Mask available arch events based on enumerate bit vector width. [Dapeng] - Add a missing space in a printf argument. [Liam] - Collect reviews. [Dapeng, Liam] v1: https://lore.kernel.org/all/20250529221929.3807680-1-seanjc@xxxxxxxxxx Sean Christopherson (14): x86: Encode X86_FEATURE_* definitions using a structure x86: Add X86_PROPERTY_* framework to retrieve CPUID values x86: Use X86_PROPERTY_MAX_VIRT_ADDR in is_canonical() x86: Implement get_supported_xcr0() using X86_PROPERTY_SUPPORTED_XCR0_{LO,HI} x86: Add and use X86_PROPERTY_INTEL_PT_NR_RANGES x86/pmu: Mark all arch events as available on AMD, and rename fields x86/pmu: Mark Intel architectural event available iff X <= CPUID.0xA.EAX[31:24] x86/pmu: Use X86_PROPERTY_PMU_* macros to retrieve PMU information x86/sev: Use VC_VECTOR from processor.h x86/sev: Skip the AMD SEV test if SEV is unsupported/disabled x86/sev: Define and use X86_FEATURE_* flags for CPUID 0x8000001F x86/sev: Use X86_PROPERTY_SEV_C_BIT to get the AMD SEV C-bit location x86/sev: Use amd_sev_es_enabled() to detect if SEV-ES is enabled x86: Move SEV MSR definitions to msr.h lib/x86/amd_sev.c | 48 ++----- lib/x86/amd_sev.h | 29 ---- lib/x86/msr.h | 6 + lib/x86/pmu.c | 25 ++-- lib/x86/pmu.h | 8 +- lib/x86/processor.h | 312 ++++++++++++++++++++++++++++++++------------ x86/amd_sev.c | 63 ++------- x86/la57.c | 2 +- x86/pmu.c | 9 +- x86/xsave.c | 11 +- 10 files changed, 273 insertions(+), 240 deletions(-) base-commit: 0293b912a7e7c019ed0144ad9ee62c09b0b61de2 -- 2.50.0.rc0.642.g800a2b2222-goog
