Re: [RFC 00/10] i386/cpu: Cache CPUID fixup, Intel cache model & topo CPUID enhencement

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On 4/23/25 7:46 PM, Zhao Liu wrote:
Hi all,

(Since patches 1 and 2 involve changes to x86 vendors other than Intel,
I have also cc'd friends from AMD and Zhaoxin.)

These are the ones I was going to clean up a long time ago:
  * Fixup CPUID 0x80000005 & 0x80000006 for Intel (and Zhaoxin now).
  * Add cache model for Intel CPUs.
  * Enable 0x1f CPUID leaf for specific Intel CPUs, which already have
    this leaf on host by default.

If you run into vendor specific branches while refactoring the topology-related code, please feel free to treat Intel and Zhaoxin as one class. For every topology CPUID leaf(0x0B, 0x1F, ...) so far, Zhaoxin has followed the Intel SDM definition exactly.




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