This series adds support for enabling hstateen bits lazily at runtime instead of statically at bootime. The boot time enabling happens for all the guests if the required extensions are present in the host and/or guest. That may not be necessary if the guest never exercise that feature. We can enable the hstateen bits that controls the access lazily upon first access. This providers KVM more granular control of which feature is enabled in the guest at runtime. Currently, the following hstateen bits are supported to control the access from VS mode. 1. BIT(58): IMSIC : STOPEI and IMSIC guest interrupt file 2. BIT(59): AIA : SIPH/SIEH/STOPI 3. BIT(60): AIA_ISEL : Indirect csr access via siselect/sireg 4. BIT(62): HSENVCFG : SENVCFG access 5. BIT(63): SSTATEEN0 : SSTATEEN0 access KVM already support trap/enabling of BIT(58) and BIT(60) in order to support sw version of the guest interrupt file. This series extends those to enable to correpsonding hstateen bits in PATCH1. The remaining patches adds lazy enabling support of the other bits. I am working on a followup series to add indirect CSR extension and move the siselect/sireg handlers out of AIA so that other features(e.g CTR) can leverage it. Note: This series just updates the hstateen bit in cfg so that any update would reflect in the correct VM state during the next vcpu load. Alternatively, we can save the hstateen state in vcpu_put to achieve this. However, it will incur additional cost on every VM exit while the current approach just updates the configuration once per VM life time upon first access. To: Anup Patel <anup@xxxxxxxxxxxxxx> To: Atish Patra <atishp@xxxxxxxxxxxxxx> To: Paul Walmsley <paul.walmsley@xxxxxxxxxx> To: Palmer Dabbelt <palmer@xxxxxxxxxxx> To: Alexandre Ghiti <alex@xxxxxxxx> Cc: kvm@xxxxxxxxxxxxxxx Cc: kvm-riscv@xxxxxxxxxxxxxxxxxxx Cc: linux-riscv@xxxxxxxxxxxxxxxxxxx Cc: linux-kernel@xxxxxxxxxxxxxxx Signed-off-by: Atish Patra <atishp@xxxxxxxxxxxx> --- Changes in v2: - Added a preventive check for lower 32 bits of hstateen. - Link to v1: https://lore.kernel.org/r/20250505-kvm_lazy_enable_stateen-v1-0-3bfc4008373c@xxxxxxxxxxxx --- Atish Patra (5): RISC-V: KVM: Lazy enable hstateen IMSIC & ISEL bit RISC-V: KVM: Add a hstateen lazy enabler helper function RISC-V: KVM: Support lazy enabling of siselect and aia bits RISC-V: KVM: Enable envcfg and sstateen bits lazily RISC-V: KVM: Remove the boot time enabling of hstateen bits arch/riscv/include/asm/kvm_aia.h | 14 ++++++- arch/riscv/include/asm/kvm_vcpu_insn.h | 4 ++ arch/riscv/kvm/aia.c | 77 ++++++++++++++++++++++++++++++++++ arch/riscv/kvm/aia_imsic.c | 8 ++++ arch/riscv/kvm/vcpu.c | 10 ----- arch/riscv/kvm/vcpu_insn.c | 61 +++++++++++++++++++++++++++ 6 files changed, 163 insertions(+), 11 deletions(-) --- base-commit: fb13a11917ea679b12b0d51905dea1cec23c015f change-id: 20250430-kvm_lazy_enable_stateen-33c8aa9a3071 -- Regards, Atish patra
